Senior Digital IC Verification Engineer – Peripheral Focus

Alifsemi; Oulu; On-site; EUR 50,000 - 70,000; Full time

Job summary

Alifsemi is seeking a motivated and experienced (Senior) Design Verification Engineer to join their Digital IC Design team in Oulu, Finland. The ideal candidate will focus on peripheral verification and participate actively in the verification team's development efforts.

Joining Alifsemi offers a unique chance to work alongside skilled professionals in a supportive environment. You will take ownership of test development and be involved in debugging verification failures and gate-level simulations (GLS).

The role emphasizes collaboration, learning, and growth, making it an exciting opportunity in the tech space.

Qualifications

• University degree in Electrical Engineering, Information Technology, Embedded Systems or similar.
• Skilled in UVM and System Verilog.
• Proficiency in C programming language.
• Experience in testbench architecture design.

Responsibilities

• Focus on building context and relationships during onboarding.
• Take ownership of test development and debug verification failures.
• Understand and debug gate-level simulations (GLS).
• Collaborate with a highly skilled verification team.

Skills

UVM

System Verilog

Programming skills (C)

Testbench architecture design

RTL design fundamentals

Clock domain Crossing (CDC)

Generic serial protocols

Constrained random verification

Microcontrollers with embedded arm processor cores

GLS knowledge

Team working and collaboration skills

Enthusiasm to learn

Education

University degree in Electrical Engineering, Information Technology, Embedded Systems or similar

Job description

Alifsemi is seeking a motivated and experienced (Senior) Design Verification Engineer to join their Digital IC Design team in Oulu, Finland. The ideal candidate will focus on peripheral verification and participate actively in the verification team's development efforts.

Joining Alifsemi offers a unique chance to work alongside skilled professionals in a supportive environment. You will take ownership of test development and be involved in debugging verification failures and gate-level simulations (GLS).

The role emphasizes collaboration, learning, and growth, making it an exciting opportunity in the tech space.