Staff DFT Design Engineer

Monolithic Power Spain S.L.; Barcelona; Presencial; EUR 90.000 - 120.000; Jornada completa

Descripción de la vacante

Monolithic Power Systems, Inc. in Barcelona, Spain, is seeking a Sr. DFT Engineer to lead end-to-end design, implementation, verification and debugging of Digital and Mixed-Signal ICs DFT architectures.

You will work on ATPG, SCAN, JTAG and other techniques, collaborate with Analog, Digital and Testing teams, and contribute to silicon bring-up and failure analysis. Strong Verilog/SystemVerilog skills and ASIC tool experience are required.

Formación

• Bachelor's or master's degree in electrical engineering or related field.
• 15+ years as a DFT engineer for ASICs or similar roles.
• Independent work style with strong collaboration across teams.
• Solid knowledge of full ASIC development process.
• Excellent RTL Verilog/SystemVerilog coding skills.

Responsabilidades

• Develop and implement DFT architectures and techniques.
• RTL design, debugging and verification of DFT-enabled blocks.
• Physical implementation, gate-level verification and testing.
• Create high-quality test and debug patterns.
• Perform STA and power analysis of DFT modes.
• Support silicon bring-up and failure analysis.
• Define DFT constraints for synthesis and P&R.
• Coordinate with Analog, Testing, Product and Digital teams.
• AMS verification for analog, digital and mixed-signal.

Conocimientos

RTL Verilog/SystemVerilog

DFT Architectures

ATPG/SCANT/IDDQ

Gate-Level Verification

JTAG/LBIST/MBIST

ATE implementation & failure backtr...

Synthesis/PEX/STA/Power

Verilog/SystemVerilog/UVM

CADENCE/Synopsys tools

Modus/Tetramax/TestInsight

Educación

Bachelor of Science in Electrical Engineering

Master of Science in Electrical Engineering

Herramientas

Cadence

Synopsys

Modus

Tetramax

Testsent

TestKompress

TestInsight

Descripción del empleo

Monolithic Power Systems, Inc. (MPS) is one of the fastest growing companies in the Semiconductor industry. We are worldwide technical leaders in Integrated Power Semiconductors and Systems Power delivery architectures. At MPS, we cultivate creativity, are passionate about sustainability, and are committed to providing leading-edge products and innovation to our customers. Our portfolio of technology helps power our world ---come join our team and see how YOU can make a difference.

Job Description

A Sr. DFT Engineer leads the end-to-end design, implementation, verification, validation and debugging of Digital and Mixed-Signal ICs DFT architectures and solutions utilizing leading edge technologies with industry standard ASIC tools. Products to be designed/verified may include power management, signal management and mixed signal functions. MPS products include: switching regulators, sensors, motor control, display drivers, audio amplifiers and power management ICs for fast-growing portable and non-portable markets such as notebooks, cell phones, telecom, digital camera, automobile and network equipment.

Essential Functions

• Development and implementation of DFT Architectures and Techniques.
• RTL Design, debugging and Verification.
• Physical implementation, debugging and Gate-Level Verification.
• Generation of High-Quality Test and Debug Patterns.
• STA and Power Analysis of DFT Modes.
• Silicon bring-up, support, failure analysis, backtracking and diagnosis.
• Synthesis: timing, input/output and DFT constraints definition.
• Results and Reports analysis.
• LEC: constraints definition and debugging.
• Results and Reports analysis.
• ATPG Generation and Simulation.
• Analog, Digital and Mixed-Signal AMS Verification support.
• Close interaction with other Departments (Analog, Testing, Product, Digital).
• Analog and Digital Functional Testing.
• Test Plan Definition for Analog and Digital Structural and Functional Testing.

Qualifications

• BSEE + 15 years of experience, MSEE + 12 years of experience as a DFT Engineer.
• Has the ability to work independently and collaborate with other teams or departments.
• Solid knowledge of the full ASIC development process.
• Excellent RTL Verilog or System Verilog coding skills.
• Knowledge of standard Digital Verification languages (SystemVerilog/UVM) and Gate-Level Sims.
• Experience with Standard and Advanced DFT Techniques (ATPG, SCAN, IDDQ, Delay Fault, SCAN Compression/EDT, Reduced Pin Count SCAN, Boundary SCAN, LBIST, MBIST, ABIST, JTAG, etc.).
• Proficiency with ATE implementation, debugging and failure backtracking.
• Excellent understanding of Trade-Off between Test Quality and Test Time.
• Very good understanding of the backend flow: Synthesis, P&R, DFT, Power, LEC and STA.
• Excellent written/verbal communication skills and strong team work/collaboration.
• Knowledge/Experience with the following is a plus: Automotive standards Knowledge of power management industry/applications I2C, I3C, SPI, USB, PMBUS, ARM and/or RISC-V designs Scripting and automation languages like TCL, Phyton and C/C++ ASIC tool knowledge(Cadence, Synopsis) and DFT tool knowledge(Modus, Tetramax, Testsent Fastscan/TestKompress, TestInsight, etc)

Location: Barcelona, Spain

Monolithic Power Systems, Inc. (MPS) is an Equal Opportunity Employer and embraces diversity in our employee population. It is the policy of MPS to provide equal opportunity to all qualified applicants and employees without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, protected veteran status or special disabled veteran, marital status, pregnancy, genetic information, or any other legally protected status.

Welcome to Monolithic Power Systems, Inc. Careers!

Monolithic Power Systems, Inc. (NASDAQ: MPWR) provides small, highly energy efficient, easy-to-use power solutions for systems found in industrial applications, telecom infrastructures, cloud computing, automotive, and consumer applications.