Senior Power Delivery Engineer

Semidynamics; Barcelona; Hybrid; EUR 120,000 - 180,000; Full time

Benefits offered by this job

4 days in Barcelona office

1 day WFH per week

1 week work from anywhere

Competitive package

Collaborative environment

Job summary

Semidynamics is seeking a Senior IC Power Delivery Architect to own the end-to-end power architecture for a high-current AI accelerator. You will define bus voltage strategies, multiphase VRs, and rack-scale distribution, while ensuring protection, telemetry, and firmware interfaces align with performance targets.

You will lead cross-functional efforts with PDN, mechanical and VR vendors, validating efficiency and thermal behavior on real silicon.

Qualifications

• 8+ years designing power delivery for high-performance computing, networking or comparable high-current digital systems.

Responsibilities

• Architecture: Define end-to-end power delivery architecture and budget from rack input to die.
• Circuit design: Design multiphase bucks for high-current core rails and auxiliary rails.
• Control & protection: Define VR control interfaces, throttling architecture, and fault response.
• Validation & cross-functional: Validate efficiency, transient, ripple, and thermal performance with PDN teams.

Skills

Power delivery

Multiphase VR design

DC-DC fundamentals

PMBus / AVSBus

Thermal management

Schematic capture

PDN impedance

Tools

PMBus design tools

Simulation tools

Job description

You will own power delivery from rack input to die bump — defining the architecture, designing the regulators that feed the accelerator, and owning the control and protection behaviour that keeps the part inside its limits under real workloads. Senior IC role with architectural ownership: you define the power architecture, not implement someone else's.

What you will work on:

• Power architecture for a high-current AI accelerator — bus voltage, conversion stages, rail partitioning
• Multiphase VR design for sub-1V, high-current core rails
• Rack-scale distribution: busbar, connector and cable current budgets across shelf, sled and rack
• Dynamic voltage scaling, droop response and closed-loop throttling
• Power sequencing, protection, telemetry and firmware interfaces

Responsibilities:

• Architecture: Define the end-to-end architecture — 12V vs. 48V, intermediate bus vs. direct conversion, lateral vs. vertical delivery — backed by loss, efficiency and thermal trade studies. Own the power budget from rack input to die, and evaluate emerging architectures against schedule and supply reality.
• Circuit design: Design multiphase bucks for high-current core rails (phase count, magnetics, power stage, controller), plus auxiliary rails, clean analog supplies, and hot-swap/eFuse protection. Specify VR controllers, DrMOS and modules; own schematic capture and power layout constraints.
• Control & protection: Define the VR control interface (PMBus, AVSBus or PWM-VID), the throttling architecture across hardware, firmware and BMC timescales, transient and slew requirements, and OCP/OVP/UVP and thermal fault response.
• Validation & cross-functional: Own efficiency, transient, droop, ripple and thermal validation on real silicon. Partner with power integrity on PDN impedance and decoupling, with mechanical and thermal on placement and cooling, and with VR and passive vendors on requirements and reviews.

Requirements:

• 8+ years designing power delivery for high-performance computing, networking or comparable high-current digital systems
• Proven multiphase VRM design for sub-1V rails at several hundred amps or more
• Strong DC-DC fundamentals: control loop design, compensation, magnetics selection, transient response
• Power delivery experience for a processor, GPU, ASIC or FPGA with demanding transient behaviour
• Working knowledge of PMBus and fast voltage control (AVSBus, PWM-VID), plus sequencing, protection and telemetry design
• Comfortable simulating power delivery and validating it in the lab, and able to reason about regulator–PDN interaction

Nice to Have:

• 48V direct conversion or vertical power delivery
• OCP rack power standards, ORv3, high-voltage DC distribution, or NVIDIA OpenVReg
• On-die droop, adaptive clocking and throttling mechanisms
• Python for automation, data analysis and lab test control
• EMC and conducted emissions on switching converters

Why Semidynamics?

• Work for one of Europe’s most promising deep-tech semiconductor scale-ups.
• Accelerated development path.
• 4 days per week in the Barcelona office (city center), 1 day WFH.
• 1 week of work from everywhere in the world.
• Competitive package.
• A collaborative, technical, and growth-oriented environment that values direct ownership and clear thinking.