Senior Analog IC Designer — Hybrid EDA Focus

Qorvo; Barcelona; Híbrido; EUR 90.000 - 120.000; Jornada completa

Descripción de la vacante

Qorvo in Barcelona is seeking a Senior Analog IC Designer to join our hybrid EDA Applications Engineering team. You will design and characterize high-performance analog/mixed-signal blocks, own circuits end-to-end, and mentor engineers across RF/analog/digital groups.

The role requires hands-on transistor-level design experience, Cadence Virtuoso and Spectre expertise, and strong collaboration with design and EDA vendors. Barcelona location, hybrid work model.

Formación

• Requires a BS in Electrical Engineering and 5+ years of transistor-level analog IC design experience.
• Demonstrated ability to design, simulate, and characterize analog/mixed-signal blocks.
• Excellent understanding of analog verification, noise, stability, and layout considerations.

Responsabilidades

• Hands-on analog/RF IC design and characterization of high-performance blocks.
• Own circuits end-to-end from design and simulation through layout oversight and silicon debug.
• Provide technical design leadership and mentoring to engineers and teams.
• Provide day-to-day apps support to RFIC, analog, mixed-signal, and digital design teams on EDA tools.
• Develop, qualify, and deploy design methodologies and reference flows for ASICs.
• Evaluate and qualify new EDA tools; collaborate with vendors to influence roadmaps.
• Collaborate with technology, CAD, and product teams to improve productivity and quality.
• Deliver training, documentation, and mentoring to raise proficiency across RF/analog/digital methodologies.

Conocimientos

Analog IC design

Clear communication

Circuit design fundamentals

Teamwork

Educación

Bachelor's Degree in Electrical Engineering

Herramientas

Cadence Virtuoso

Spectre

Descripción del empleo

Qorvo in Barcelona is seeking a Senior Analog IC Designer to join our hybrid EDA Applications Engineering team. You will design and characterize high-performance analog/mixed-signal blocks, own circuits end-to-end, and mentor engineers across RF/analog/digital groups.

The role requires hands-on transistor-level design experience, Cadence Virtuoso and Spectre expertise, and strong collaboration with design and EDA vendors. Barcelona location, hybrid work model.