Research Engineer - RTL OoO Core for RISC-V HPC

Barcelona Supercomputing Center; Barcelona; Presencial; EUR 55.000 - 75.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Restaurant tickets

Private health insurance

Relocation support

Flexible working hours

Descripción de la vacante

Barcelona Supercomputing Center in Barcelona seeks a Research Engineer for RTL OoO core development within the DARE program. You will design and verify high-end processor cores, focusing on RISC-V, OoO pipelines, and HPC workloads, contributing to energy-efficient, scalable architectures.

Requires SystemVerilog expertise, Python/CoCoTB, and a strong foundation in computer architecture. The role offers a full-time contract with competitive salary and relocation support.

Formación

• BS or MS in Telecommunication, Electronics, Computer Science, or Computer Engineering.
• Proficiency in SystemVerilog.
• Computer architecture knowledge.
• Familiarity with RISC-V specification.
• Git version control knowledge.
• Python and CoCoTB.

Responsabilidades

• Research of computer architectural techniques and development of RTL hardware structures related to superscalar OoO core design.
• Review and analyze state-of-the-art performance techniques for OoO processor architectures.
• Design RTL structures by implementing the selected techniques for RISC-V CPU architectures.
• Implement complex control logic, data paths, and microarchitectural features in SystemVerilog.
• Integration into RISC-V core with configurable capabilities and performance tradeoffs.
• Verification and validation using CoCoTB and Python hardware modeling.
• Develop verification tests and validation procedures to ensure correctness.
• Performance evaluation via simulation and benchmarking to measure improvements.

Conocimientos

Good English communication

Teamwork

Time management

Problem-solving

Critical thinking

Attention to detail

Interpersonal skills

Adaptability

Educación

BS or MS in Telecommunication, Electronics, Computer Science, or Computer Engineering

Herramientas

Git

Docker

Linux

CoCoTB

Descripción del empleo

Barcelona Supercomputing Center in Barcelona seeks a Research Engineer for RTL OoO core development within the DARE program. You will design and verify high-end processor cores, focusing on RISC-V, OoO pipelines, and HPC workloads, contributing to energy-efficient, scalable architectures.

Requires SystemVerilog expertise, Python/CoCoTB, and a strong foundation in computer architecture. The role offers a full-time contract with competitive salary and relocation support.