Principal AMS Design Engineer High Speed Mixed Signal IC Design

Chipright; Madrid; Hybrid; EUR 90,000 - 130,000; Full time

Benefits offered by this job

Hybrid work model

Language classes in English andSpanish

Health insurance

Job summary

Chipright Inc. is seeking a Principal AMS Design Engineer to drive architecture, design and verification of high-speed analog and mixed-signal ICs for automotive and industrial markets.

The role encompasses block- and system-level definitions, end-to-end design flow, and leadership across a skilled engineering team. You will mentor engineers, shape layoffs, collaborate with system and digital teams, and push innovations for future roadmaps with IP generation.

Qualifications

• MSc or PhD in Electronics, Electrical, Computer Engineering or relevant field.
• Extensive experience in designing full-custom analog IP blocks in advanced CMOS.
• Proven track record driving product definition, qualification and manufacturing hand-off.

Responsibilities

• Define block- and system-level architectures in advanced CMOS processes.
• Oversee end-to-end design flow from architecture to layout verification.
• Lead layout reviews focusing on high-speed/precision blocks.
• Partner with test/product teams for silicon characterization and validation.
• Collaborate with system and digital teams for AMS verification and modeling.
• Lead exploratory research and IP generation for roadmap directions.
• Mentor junior and senior analog designers; drive cross-functional alignment.

Skills

Analog design

Mixed-signal design

Full-custom layout

Mentorship

Communication

Education

MSc or PhD in Electronics, Electrical, Computer Engineering or relevant field

Tools

Cadence Virtuoso

Spectre

AMS Designer

Synopsys

Calibre

Job description

Principal AMS Design Engineer required for fabless semiconductor company developing high-speed mixed-signal and optical communication ICs for automotive and industrial markets.

Seeking an industry-leading Principal Analog & Mixed-Signal (AMS) Design Engineer to drive the definition, architecture, and end-to-end execution of next-generation analog and mixed-signal integrated circuits.

In this high-impact, technical leadership role, you will define block- and system-level architectures in advanced sub-nanometric CMOS processes, guide complex full-custom IC designs, and mentor a talented team of engineers.

You will serve as the technical authority, bridging system requirements, advanced design methodologies, and silicon-proven productization.

• Drive the architecture and top-level specification of complex analog and mixed-signal subsystems embedded in advanced SoCs (e.g., high-performance ADCs, DACs, PLLs, high-speed data interfaces, and optoelectronic integrations).
• Advanced Design & Full-Flow Execution: Oversee and execute the end-to-end design flow (from architectural modelling and schematic capture to layout oversight and full verification at the extracted level) in sub-nanometric CMOS processes.
• Layout Strategy & Oversight: Define advanced layout guidelines, electromigration/IR-drop standards, and matching strategies for layout engineers; lead critical layout reviews for sensitive high-speed/high-precision blocks.
• Silicon Validation & Productization: Partner closely with test and product engineering teams to define comprehensive test strategies for fabricated ICs. Spearhead lab characterization data analysis, silicon debugging, and correlation with simulation results.
• System-Level Integration & Co-Verification: Collaborate with system and digital design teams to generate high-level behavioural models (e.g., Verilog-A/AMS) for top-level system evaluation and complex mixed-signal verification alongside digital processing blocks.
• Innovation & IP Generation: Lead exploratory research into novel architectures and power/area-efficient solutions for future company roadmaps, driving the generation of high-value patents.

Technical Mentorship & Leadership:

• Mentor and guide junior and senior analog designers, elevating team technical capabilities and fostering engineering excellence.

Cross-Functional & Executive Communication:

• Drive technical alignment across multidisciplinary teams, present design reviews to stakeholders, and author comprehensive technical documentation.

Technical Knowledge & Expertise:

• MSc or PhD in Electronics, Electrical, Computer Engineering or relevant field.
• Deep expertise in designing full-custom analog IP blocks in advanced sub nanometric CMOS technologies (e.g., 28nm, 16nm, FinFET nodes, or below).
• Expert-level mastery of industry-standard EDA tools (Cadence Virtuoso, Spectre, AMS Designer, Synopsys, Calibre). Comprehensive knowledge of advanced full-custom layout techniques, noise coupling mitigation, substrate noise, and mismatch management.
• Demonstrated history of driving product definition, qualification, characterization, and manufacturing hand-off.
• Strong background in mixed-signal verification methodologies (UVM-AMS, behavioral modeling).

Soft Skills:

• Technical Leadership: Demonstrated ability to lead technical teams, influence engineering decisions, and inspire peers.
• Excellent written and verbal English communication skills, with the ability to articulate complex technical concepts clearly to cross-functional teams and executive leadership.

Highly competitive salary on offer, along with hybrid, flexible hours, languages classes in English and Spanish, health insurance as well as other company benefits.

This role is open to Engineers with across Europe with an EU Visa.