Digital Ic Designer

TMRW; Madrid; Presencial; EUR 90.000 - 130.000; Jornada completa

Descripción de la vacante

The TMRW Foundation SILICON is seeking a skilled Digital IC Designer to develop, simulate, and verify complex digital ICs using a Cadence-centric flow. You will implement RTL in VHDL/Verilog, perform functional verification, and drive synthesis and physical implementation tasks across floorplanning, placement, and routing.

Responsibilities include timing closure with Tempus, DRC/LVS verification, and close collaboration with architects, analog designers, and layout engineers.

Formación

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field with focus on VLSI or microelectronics.
• Proven experience in digital IC design with a strong project portfolio.
• Expertise in Cadence digital design flow including Virtuoso, Genus, Innovus, Tempus, and verification tools.
• Familiarity with other EDA tools (Synopsys, Mentor Graphics) is a plus.
• Proficiency in Verilog/VHDL.
• Strong understanding of semiconductor physics and fabrication processes.
• Knowledge of low-power design techniques and scripting (Tcl, Python).
• Strong analytical and problem-solving skills; team collaboration.

Responsabilidades

• RTL design and development using VHDL/Verilog from specifications.
• Simulation and verification of IC designs with Cadence tools (NCLaunch/Incisive, SimVision).
• Synthesis and physical design tasks including floorplanning, placement, clock tree synthesis, routing with Genus/Innovus.
• Timing analysis and signoff using Tempus to meet timing requirements.
• Physical verification: DRC/LVS with Pegasus/Innovus for fabrication readiness.
• Collaborate with system architects, analog designers, and layout engineers.
• Create and maintain design documentation and test plans.

Conocimientos

RTL Design

Verilog/VHDL

Cadence tools

Scripting (Tcl/Python)

Timing analysis

Educación

Bachelor's or Master's in Electrical Engineering or related

Herramientas

Cadence Genus

Cadence Innovus

Cadence Virtuoso

Cadence Tempus

NC-Verilog / Incisive

Descripción del empleo

Join a thriving environment tasked with delivering new and disruptive technologies!

We are seeking a highly motivated and skilled Digital IC Designer to join our engineering team.

The ideal candidate will be responsible for the design, development, simulation, and verification of complex digital integrated circuits (ICs) for various applications.

This role requires hands?on experience with the Cadence suite of Electronic Design Automation (EDA) tools to ensure designs meet performance, power, and area specifications.

Key Responsibilities

• RTL Design & Development: Develop and implement RTL (Register Transfer Level) code using VHDL/Verilog based on design specifications.
• Simulation and Verification: Perform thorough functional verification and simulation of IC designs using Cadence verification tools (e.g., Cadence NC?Launch/Incisive, SimVision) to validate performance and functionality.
• Synthesis and Implementation: Work on synthesis and physical design tasks, including floorplanning, placement, clock tree synthesis, and routing using Cadence physical design platforms (e.g., Cadence Genus, Cadence Innovus).
• Timing Analysis and Signoff: Conduct static timing analysis (STA) and timing closure using tools like Cadence Tempus to ensure designs meet all timing requirements.
• Physical Verification: Perform design rule checks (DRC) and layout versus schematic (LVS) verification using tools such as Cadence Pegasus or Cadence Innovus to prepare designs for fabrication (tape?out).
• Collaboration: Collaborate with cross?functional teams, including system architects, analog designers, and layout engineers, to ensure seamless integration and successful product development.
• Documentation: Create and maintain comprehensive design documentation, technical reports, and test plans.

Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field with a focus on VLSI or microelectronics.
• Proven experience in digital IC design, with a strong portfolio of completed projects.
• Expertise in the Cadence digital design flow is a must, including tools like Virtuoso (for schematics/layout viewing), Genus (synthesis), Innovus (physical design), Tempus (timing analysis), and verification tools.
• Familiarity with other industry?standard EDA tools (Synopsys, Mentor Graphics) is a plus.
• Proficiency in hardware description languages (Verilog, VHDL).
• Strong understanding of semiconductor physics and fabrication processes.
• Knowledge of low?power design techniques and methodologies.
• Scripting skills (Tcl, Perl, Python) to automate design flows are desirable.
• Strong analytical and problem?solving skills, excellent communication, and the ability to work effectively in a team environment.

Nice to Have

• Familiarity with other industry?standard EDA tools (e.g., Synopsys, Mentor Graphics).
• Experience with low?power design methodologies and advanced optimization techniques.
• Strong scripting abilities (Tcl, Perl, Python) to automate design flows and improve efficiency.
• Exposure to mixed?signal or analog/digital integration projects.
• Knowledge of semiconductor fabrication processes and design for manufacturability (DFM).
• Experience working in multicultural, cross?functional engineering teams.
• Ability to produce clear technical documentation and communicate complex concepts effectively.

Why Join Us

At The TMRW Foundation SILICON – you will be part of a dynamic and innovative team that is dedicated to building cutting?edge technologies.

We offer a collaborative and inclusive work environment where your contributions will make a significant impact.

Location: Barcelona, Catalonia, Spain.

Seniority Level: Mid?Senior level

Employment Type: Full?time

Job Function: Engineering and Design

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