Digital Ic Designer

TMRW; Barcelona; On-site; EUR 60,000 - 90,000; Full time

Job summary

The TMRW Foundation SILICON in Barcelona, Spain is seeking a skilled Digital IC Designer to join our engineering team and deliver disruptive digital ICs. You will design, simulate, and verify complex chips using Cadence tools to meet performance, power, and area targets.

Ideal candidates will have hands-on RTL design (Verilog/VHDL), strong CADENCE experience, and a track record of successful projects. Collaboration with architects, layout engineers, and testers is essential for this role.

Qualifications

• Bachelor's or master's degree in Electrical/Computer Engineering with focus on VLSI or microelectronics.
• Proven experience in digital IC design with a strong project portfolio.
• Expertise in the Cadence digital design flow and tools.
• Familiarity with Synopsys/Mentor tools is a plus.
• Proficiency in Verilog and VHDL and understanding of HDLs.

Responsibilities

• RTL Design & Development: implement RTL code using VHDL/Verilog per specs.
• Simulation & Verification: verify IC designs with Cadence tools (NC Launch/Incisive, SimVision).
• Synthesis & Implementation: floorplanning, placement, clock tree, routing with Genus/Innovus.
• Timing Analysis & Signoff: perform STA with Tempus to meet timing requirements.
• Physical Verification: DRC/LVS checks using Pegasus/Innovus for fabrication readiness.
• Collaboration: work with system architects, analog designers, and layout engineers.
• Documentation: create design docs, reports, and test plans.

Skills

RTL Design

Verilog

VHDL

Digital IC Design

CADENCE

Timing Closure

Scripting (Tcl/Python)

Collaboration

Education

Bachelor's degree in Electrical/Computer Engineering

Master's degree in Electrical/Computer Engineering

Tools

Cadence Virtuoso

Cadence Genus

Cadence Innovus

Cadence Tempus

SimVision

NC-Launch/Incisive

Pegasus

Job description

Join a thriving environment tasked with delivering new and disruptive technologies!

We are seeking a highly motivated and skilled Digital IC Designer to join our engineering team.

The ideal candidate will be responsible for the design, development, simulation, and verification of complex digital integrated circuits (ICs) for various applications.

This role requires hands?on experience with the Cadence suite of Electronic Design Automation (EDA) tools to ensure designs meet performance, power, and area specifications.

Key Responsibilities

• RTL Design & Development: Develop and implement RTL (Register Transfer Level) code using VHDL/Verilog based on design specifications.
• Simulation and Verification: Perform thorough functional verification and simulation of IC designs using Cadence verification tools (e.g., Cadence NC?Launch/Incisive, SimVision) to validate performance and functionality.
• Synthesis and Implementation: Work on synthesis and physical design tasks, including floorplanning, placement, clock tree synthesis, and routing using Cadence physical design platforms (e.g., Cadence Genus, Cadence Innovus).
• Timing Analysis and Signoff: Conduct static timing analysis (STA) and timing closure using tools like Cadence Tempus to ensure designs meet all timing requirements.
• Physical Verification: Perform design rule checks (DRC) and layout versus schematic (LVS) verification using tools such as Cadence Pegasus or Cadence Innovus to prepare designs for fabrication (tape?out).
• Collaboration: Collaborate with cross?functional teams, including system architects, analog designers, and layout engineers, to ensure seamless integration and successful product development.
• Documentation: Create and maintain comprehensive design documentation, technical reports, and test plans.

Qualifications

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field with a focus on VLSI or microelectronics.

Proven experience in digital IC design, with a strong portfolio of completed projects.

Expertise in the Cadence digital design flow is a must, including tools like Virtuoso (for schematics/layout viewing), Genus (synthesis), Innovus (physical design), Tempus (timing analysis), and verification tools.

Familiarity with other industry?standard EDA tools (Synopsys, Mentor Graphics) is a plus.

Proficiency in hardware description languages (Verilog, VHDL).

Strong understanding of semiconductor physics and fabrication processes.

Knowledge of low?power design techniques and methodologies.

Scripting skills (Tcl, Perl, Python) to automate design flows are desirable.

Strong analytical and problem?solving skills, excellent communication, and the ability to work effectively in a team environment.

Nice to Have

• Familiarity with other industry?standard EDA tools (e.g., Synopsys, Mentor Graphics).
• Experience with low?power design methodologies and advanced optimization techniques.
• Strong scripting abilities (Tcl, Perl, Python) to automate design flows and improve efficiency.
• Exposure to mixed?signal or analog/digital integration projects.
• Knowledge of semiconductor fabrication processes and design for manufacturability (DFM).
• Experience working in multicultural, cross?functional engineering teams.
• Ability to produce clear technical documentation and communicate complex concepts effectively.

Why Join Us

At The TMRW Foundation SILICON – you will be part of a dynamic and innovative team that is dedicated to building cutting?edge technologies.

We offer a collaborative and inclusive work environment where your contributions will make a significant impact.

Location: Barcelona, Catalonia, Spain.

Seniority Level

Mid?Senior level

Employment Type

Full?time

Job Function

Engineering and Design

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