DFT ASIC / SoC Engineer | Design for Test

Oesía Group

Rivas-Vaciamadrid

On-site

EUR 60,000 - 85,000

Full time

2 days ago
Be an early applicant

A complete application in a minute

Tailored resume and cover letter, ready to send.

Get past ATS filters

Job summary

Grupo Oesía is seeking an experienced DFT/SoC engineer to join a multidisciplinary team. You will design, develop and integrate test solutions for ASICs and SoCs, contributing to high-value projects across strategic sectors.

The role requires 3+ years in DFT, knowledge of ATPG/MBIST/LBIST and experience with Cadence/Synopsys. ARM and RISC-V familiarity are highly valued, along with collaboration across design, verification and physical teams.

Qualifications

  • Bachelor's or Master's degree in Electronic Engineering, Telecommunications Engineering, Industrial Engineering or a related field.
  • At least 3 years of experience in DFT (Design for Test) for ASICs or SoCs.
  • Knowledge of scan insertion, ATPG, MBIST and/or LBIST.
  • Experience with EDA tools (Cadence, Synopsys).
  • Highly valued: experience in complete ASIC development cycles, silicon validation and bring-up, and knowledge of ARM, RISC-V and SoC architectures.
  • Projects with real technological impact.
  • Teams where sharing knowledge is part of the way we work.
  • Continuous professional development tailored to each profile and individual.
  • An environment where engineering and people move forward together.

Responsibilities

  • Design and implement Design for Test (DFT) strategies for ASIC circuits and SoC systems.
  • Develop test and diagnostic structures for integrated circuits, such as scan chains, MBIST or LBIST.
  • Participate in test pattern generation and validation activities (ATPG).
  • Collaborate with design, verification and physical implementation teams.
  • Analyse coverage metrics and optimise test solutions throughout the development process.
  • Support silicon validation and manufacturing activities.

Skills

DFT for ASICs/SoCs
ATPG
MBIST
LBIST
Design for Test
ARM/RISC-V knowledge

Education

Bachelor’s or Master’s in Electronic/Telecommunications/Industrial Engineering

Tools

Cadence
Synopsys

Job description

DFT ASIC / SoC Engineer (Global opportunity)

Our projects become technology that protects, connects and drives strategic sectors forward: our sectors. At Grupo Oesía, we work to ensure that innovation has a real impact, and we are looking for people who want to be part of this challenge.

WHAT WILL YOUR MISSION BE?

You will be part of a multidisciplinary team where you will design, develop and integrate technological solutions that become part of high-value projects for our clients.

WHAT WILL YOU DO IN YOUR DAY-TO-DAY?
  • Design and implement Design for Test (DFT) strategies for ASIC circuits and SoC systems.
  • Develop test and diagnostic structures for integrated circuits, such as scan chains, MBIST or LBIST.
  • Participate in test pattern generation and validation activities (ATPG).
  • Collaborate with design, verification and physical implementation teams.
  • Analyse coverage metrics and optimise test solutions throughout the development process.
  • Support silicon validation and manufacturing activities.
WHAT ARE WE LOOKING FOR?
  • Bachelor's or Master's degree in Electronic Engineering, Telecommunications Engineering, Industrial Engineering or a related field.
  • At least 3 years of experience in DFT (Design for Test) for ASICs or SoCs.
  • Knowledge of scan insertion, ATPG, MBIST and/or LBIST.
  • Experience with EDA tools (Cadence, Synopsys).
  • Highly valued: experience in complete ASIC development cycles, silicon validation and bring-up, and knowledge of ARM, RISC-V and SoC architectures.
  • Projects with real technological impact.
  • Teams where sharing knowledge is part of the way we work.
  • Continuous professional development tailored to each profile and individual.
  • An environment where engineering and people move forward together.

If you are motivated by new technological challenges and want to be part of projects that make a difference, we would love to meet you.

Develop your career where technology has a purpose. At Grupo Oesía, we develop dual-use digital and industrial engineering projects across strategic sectors, strengthening key capabilities for Spain and Europe from our technology centres and alongside a team of more than 3,800 professionals across Spain, Brussels, Latin America and Asia.

Grupo Oesía is a Spanish multinational company dedicated to dual-use digital and industrial engineering, developing and implementing projects worldwide.

At Grupo Oesía we believe in diversity and equal opportunities as drivers of innovation, and in inclusion as the foundation for growth. We foster an environment where everyone, without any distinction, can develop their talent and contribute to building a better future.

Cipherbit-Grupo Oesía is the first Spanish brand specifically dedicated to cybersecurity and the development of secure communication products (encryption), certified by the CCN and NATO.

This division of Grupo Oesía is focused on the national and international environment of Armed Forces, Public Administrations, and critical infrastructures, thereby reinforcing Europe's strategic autonomy in cyber defense.

With nearly 50 years of experience, we have developed products and services that already benefit millions of people across healthcare, security and defence, space, telecommunications, finance, logistics and the agri-food sector. But what truly sets us apart are the

Our projects become technology that protects, connects and drives strategic sectors forward: our sectors. At Grupo Oesía, we work to ensure that innovation has a real impact, and we are looking for people who want to be part of this challenge.

WHAT WILL YOUR MISSION BE?

You will be part of a multidisciplinary team where you will design, develop and integrate technological solutions that become part of high-value projects for our clients.

WHAT WILL YOU DO IN YOUR DAY-TO-DAY?
  • Design and implement Design for Test (DFT) strategies for ASIC circuits and SoC systems.
  • Develop test and diagnostic structures for integrated circuits, such as scan chains, MBIST or LBIST.
  • Participate in test pattern generation and validation activities (ATPG).
  • Collaborate with design, verification and physical implementation teams.
  • Analyse coverage metrics and optimise test solutions throughout the development process.
  • Support silicon validation and manufacturing activities.
WHAT ARE WE LOOKING FOR?
  • Bachelor's or Master's degree in Electronic Engineering, Telecommunications Engineering, Industrial Engineering or a related field.
  • At least 3 years of experience in DFT (Design for Test) for ASICs or SoCs.
  • Knowledge of scan insertion, ATPG, MBIST and/or LBIST.
  • Experience with EDA tools (Cadence, Synopsys).
  • Highly valued: experience in complete ASIC development cycles, silicon validation and bring-up, and knowledge of ARM, RISC-V and SoC architectures.
  • Projects with real technological impact.
  • Teams where sharing knowledge is part of the way we work.
  • Continuous professional development tailored to each profile and individual.
  • An environment where engineering and people move forward together.
WHAT WILL YOU FIND AT GRUPO OESÍA?
  • Projects with real technological impact.
  • Teams where sharing knowledge is part of the way we work.
  • Continuous professional development tailored to each profile and individual.
  • An environment where engineering and people move forward together.

If you are motivated by new technological challenges and want to be part of projects that make a difference, we would love to meet you.

ABOUT GRUPO OESÍA

Develop your career where technology has a purpose. At Grupo Oesía, we develop dual-use digital and industrial engineering projects across strategic sectors, strengthening key capabilities for Spain and Europe from our technology centres and alongside a team of more than 3,800 professionals across Spain, Brussels, Latin America and Asia.

Grupo Oesía is a Spanish multinational company dedicated to dual-use digital and industrial engineering, developing and implementing projects worldwide.

At Grupo Oesía we believe in diversity and equal opportunities as drivers of innovation, and in inclusion as the foundation for growth. We foster an environment where everyone, without any distinction, can develop their talent and contribute to building a better future.

Cipherbit-Grupo Oesía is the first Spanish brand specifically dedicated to cybersecurity and the development of secure communication products (encryption), certified by the CCN and NATO.

This division of Grupo Oesía is focused on the national and international environment of Armed Forces, Public Administrations, and critical infrastructures, thereby reinforcing Europe's strategic autonomy in cyber defense.

With nearly 50 years of experience, we have developed products and services that already benefit millions of people across healthcare, security and defence, space, telecommunications, finance, logistics and the agri-food sector. But what truly sets us apart are the people who make each of these projects possible.

We want you to reach your full potential. That is why we build professional environments based on equal opportunities, inclusion and recognition of each person’s talent. We foster an environment where talent can learn, collaborate and continue to grow, contributing new ideas and developing its full potential. Because innovation happens when different perspectives work towards a shared purpose.

If you are looking for a place to develop your career, take on new challenges and be part of projects with impact, we would love to meet you.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

SoC / ASIC Architect | Semiconductor & Security Technologies
SoC / ASIC Architect | Semiconductor & Security Technologies

Cipherbit - Grupo Oesía • Rivas-Vaciamadrid

On-site
EUR 90,000 - 120,000
RTL ASIC Engineer | Digital Design & Semiconductor Technologies
RTL ASIC Engineer | Digital Design & Semiconductor Technologies

Cipherbit - Grupo Oesía • Rivas-Vaciamadrid

On-site
EUR 55,000 - 75,000
SoC / ASIC Architect | Semiconductor & Security Technologies
SoC / ASIC Architect | Semiconductor & Security Technologies

Oesía Group • Rivas-Vaciamadrid

On-site
EUR 75,000 - 110,000
Senior Project Manager – ASIC / PRS | Space & Defence (Global Opportunity)
Senior Project Manager – ASIC / PRS | Space & Defence (Global Opportunity)

Cipherbit - Grupo Oesía • Rivas-Vaciamadrid

On-site
EUR 85,000 - 110,000
Senior Project Manager – ASIC / PRS | Space & Defence (Global Opportunity)
Senior Project Manager – ASIC / PRS | Space & Defence (Global Opportunity)

Oesía Group • Rivas-Vaciamadrid

On-site
EUR 90,000 - 120,000
RTL ASIC Engineer | Digital Design & Semiconductor Technologies
RTL ASIC Engineer | Digital Design & Semiconductor Technologies

Oesía Group • Rivas-Vaciamadrid

On-site
EUR 55,000 - 85,000
ASIC Technical Lead | Semiconductor & Security Technologies
ASIC Technical Lead | Semiconductor & Security Technologies

Cipherbit - Grupo Oesía • Rivas-Vaciamadrid

On-site
EUR 90,000 - 120,000
ING. HW-RF - Global Opportunity
ING. HW-RF - Global Opportunity

INSTER - Grupo Oesía • Getafe

On-site
EUR 45,000 - 65,000
ASIC Technical Lead | Semiconductor & Security Technologies
ASIC Technical Lead | Semiconductor & Security Technologies

Oesía Group • Rivas-Vaciamadrid

On-site
EUR 90,000 - 130,000
Ingeniero/a de diseño para test (DFT) - ASIC/SoC
Ingeniero/a de diseño para test (DFT) - ASIC/SoC

Cipherbit - Grupo Oesía • Rivas-Vaciamadrid

On-site
EUR 40,000 - 65,000