Senior Verification Engineer

ic resources; Niedersachsen; Vor Ort; EUR 70.000 - 90.000; Vollzeit

Zusammenfassung

A leading company in optical communications is seeking a Senior Verification Engineer based in Northern Germany. The role involves contributing to the development of high-speed System-on-Chip devices for cutting-edge optical products. Candidates should hold a Master’s or PhD degree, with at least 5 years of ASIC development experience, expertise in verification methodologies, and proficiency in SystemVerilog and scripting languages. Excellent communication skills in English are required.

Qualifikationen

• Minimum 5 years of experience in ASIC development.
• Strong knowledge of verification methodologies.
• Proficient in SystemVerilog and scripting languages.

Aufgaben

• Contribute to the development of high-speed System-on-Chip devices.
• Work on industry-leading optical products including transceivers and ROADMs.
• Collaborate with design teams across multiple countries.

Kenntnisse

Expertise in verification methodologies & tools

Strong knowledge of UVM

Excellent programming skills in hardware description languages (SystemVerilog)

Good programming skills in scripting languages (Python, Perl, Tcl)

Excellent written and verbal communication skills in English

Ausbildung

Master’s degree (Dipl.-Ing.) or PhD in electrical engineering or computer science

Tools

Hardware description languages

Scripting languages

Jobbeschreibung

Senior VerificationEngineer - Lower Saxony - leading optical communications company

A global leader in opto-electronic applications for industrial, optical communications, aerospace and defence, life sciences, semiconductor and consumer market and offices in multiple countries is looking for a Senior Verification Engineer for one of their design centres in Northern Germany. The Senior Verification Engineer will contribute to the development of high-speed System-on-Chip devices in latest CMOS technology for industry-leading optical products including transceivers, transponders and ROADM products.

The successful Senior Verification Engineer has the following skills and qualifications :

• Master’s degree (Dipl.-Ing.) or PhD in electrical engineering or computer science
• Minimum 5 years of experience in ASIC development
• Expertise in verification methodologies & tools
• Strong knowledge of UVM
• Excellent programming skills in hardware description languages ( SystemVerilog)
• Good programming skills in scripting languages ( Python, Perl, Tcl)
• Excellent written and verbal communication skills in English

For more information and to apply, please contact Lucy Edmondson.