Senior Staff Digital Verification Engineer (f/m/d)

Renesas Electronics; Dresden; Vor Ort; EUR 90.000 - 130.000; Vollzeit

Zusammenfassung

Renesas Electronics seeks a senior verification engineer in Dresden, Germany to lead verification planning and execution for IC designs. You will set up complex verification environments, testcases, and co-simulations for analog/mixed-signal blocks, focusing on sensor signal conditioners and MCU hardware/software co-simulation.

The role requires a Master’s in electrical/computer engineering with ~10 years in functional IC verification, UVM, and constrained random methods.

Qualifikationen

• Master's degree in electrical engineering or computer engineering or a related field.
• Expert knowledge in functional verification of IC designs with ~10 years of experience.
• Expert knowledge in UVM and constrained random verification with regressions.
• State-of-the-art development and management of verification environments, components, and verification IP.
• Significant experience related to analog mixed-signal modeling and verification.
• At least basic knowledge in formal verification and SystemVerilog assertions.
• Knowledge of verification of designs with MCU and hardware/software co-simulation.
• Good documentation skills and ability to work per automotive standards IATF 16949 and ISO 26262.
• Excellent communication and teamwork; able to explain complex problems clearly.
• Ability to learn new methods and apply them efficiently.
• Self-driven, multi-site international team experience.
• Publications and talks in ISA are a plus.
• Fluent English in text and speech.

Aufgaben

• Drive the planning and execution phases of verification projects as lead with other verification engineers.
• Set up complex verification environments, components and testcases for ICs.
• Follow automotive development processes based on IATF 16949.
• Work on industrial applications with focus on sensor signal conditioners.
• Create models of analog blocks and run co-simulations for verification.
• Establish best practices for verification methodologies and reuse.
• Contribute to verification strategy to improve efficiency and results.
• Collaborate across digital/analog design, verification, architecture, and test engineering.
• Mentor team members to raise overall capability and efficiency.
• Support quality procedures related to verification and IP selection.
• Advise on new tools/workflows to improve verification quality and efficiency.

Kenntnisse

Functional verification

UVM

Constrained random verification

Verification environments

Analog mixed-signal modeling

SystemVerilog assertions

Co-simulation

Documentation

Communication

Mentoring

Multi-site collaboration

Methodology improvement

Ausbildung

Master's degree in electrical engineering or computer engineering

Jobbeschreibung

Responsibilities

• Drive the planning and execution phases of projects as verification lead with other verification engineers
• Setup of complex verification environments, components and testcases for integrated circuit designs
• For automotive applications following development process based on IATF 16949
• For industrial applications
• With focus on sensor signal conditioners
• Create models of analog blocks and setups for analog mixed-signal simulations. Run co-simulations to verify models.
• Establish and follow best practices for different verification methodologies
• Contribute to our verification strategy (general and project specific) to improve efficiency of verification and ensure good results within schedule
• Collaborate with project team members across disciplines (digital/analog design, verification, architecture, test engineering) for successful execution of verification in parallel to design efforts. Establish consistent and efficient workflows in projects.
• Mentor other team members to improve the capabilities and efficiency of the whole team
• Support development and enhancement of the quality procedures related to verification
• Support selection of verification IP
• Support evaluation and adoption of new tools and workflows to improve efficiency and quality of our verification efforts
• Provide feedback on and improve existing verification environments for efficiency and re-usability

Qualifications

• Master's degree or comparable in electrical engineering or computer engineering or in a related field
• Expert knowledge in functional verification of integrated circuit designs which usually requires at least 10 years of specific work experience
• Expert knowledge in UVM and constrained random verification with regressions
• State-of-the-art development and management of verification environments, components, and verification IP
• Significant experience related to analog mixed-signal modeling and verification
• At least basic knowledge in formal verification and SystemVerilog assertions
• Knowledge of verification of designs with MCU and hardware/software co-simulation
• Good documentation skills and willingness to work on documentation as required in automotive development processes according to standards IATF 16949 and ISO 26262 (functional safety)
• Excellent communication skills and good team player. Being able to understand issues and concerns. Being able to explain difficult problems and solutions in a clear way.
• Ability to understand development processes, extract key properties, identify weaknesses, and develop strategies for pragmatic improvement
• Ability and attitude to learn new methods and work towards an efficient and result-oriented adoption of them
• Self-driven work style
• Work in a multi-site, multi-culture development environment
• Proven record of technical publications and technical presentations ISA a plus
• Fluent English in text and speech

Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.