Senior High-Speed Analog/RF System Architect (f/m/d)

Rozgoo; Nordrhein-Westfalen; On-site; EUR 120,000 - 180,000; Full time

Job summary

Black Semiconductor seeks a Senior High-Speed Analog/RF System Architect to own the analog, RF, and high-speed SerDes architecture of CMOS SoCs powering graphene photonic interconnect technology.

You will define electrical architectures at the electronics-photonics boundary, collaborating with Photonics Circuit Designer and SI teams to translate deployment requirements into scalable, manufacturable solutions emphasizing performance, power and ROI.

Qualifications

• Own analog/RF and high-speed SerDes architecture for optical transceiver SoCs.
• Define electrical architecture at boundary between electronics and photonics.
• Collaborate with Photonics Circuit Designer, Package Electrical/SI Architect, analog design, and digital/EIC teams.
• Translate deployment requirements into architectures and evaluate the ROI of future features.

Responsibilities

• Drive system-level decisions across the electrical-to-optical channel.
• Own the Analog IP roadmap and PPA estimates.
• Define PRS per product and maintain verification plans.
• Align architecture direction with technology and contractor capabilities.

Skills

Analog RF System Architecture

CMOS SoCs

SerDes

PLL

High-speed signaling

Photonic interconnect

Tools

EDA flows

Job description

About us

We see the semiconductor industry as a realm of possibility. We see opportunity. We see the profound impact that our graphene solutions will have in transforming the industry. We invite you to join us in driving change with our fundamentally human-centered approach, uniting bright minds around a shared vision. The vision is: Prove to everybody that you can make a fundamental change. Prove with your knowledge and skills how things can be done differently. Together, we can change the paradigm of how the world connects

About our technology

The semiconductor industry’s growing demand for more powerful chips with higher bandwidth and lower power finds its solution in our technology. We connect chips to high-throughput, low-delay computing networks. The key lies in harnessing the physical properties of graphene to combine electronic computing with photonic communication, allowing countless chips to interact almost as if they were one. Our graphene photonic innovation increases computing power and efficiency to a new order of magnitude. In short, we connect chips to create powerful and energy-efficient networks, overcoming connectivity limitations in the semiconductor industry. We deliver the graphene solution

The Role

We are seeking a skilled Senior High-Speed Analog/RF System Architect at Black Semiconductor to own the analog, RF, and high-speed SerDes architecture of the CMOS SoCs powering our graphene photonic interconnect technology. You will define the electrical architecture at the boundary between electronics and photonics, including PLLs, TIAs, drivers, equalizers, ADC/DACs, and CDRs, translating system-level performance targets into scalable and manufacturable SoC solutions. Working closely with the Photonics Circuit Designer, Package Electrical/SI Architect, analog design, and digital/EIC teams, you will drive architecture decisions across the complete electrical-to-optical channel. You will own system-level trade-offs across bandwidth, power, reach, cost, and manufacturability, while engaging directly with customers and product teams to translate deployment requirements into architectures and evaluate the impact and ROI of future features. To join our team, you should be excited to Own the analog/RF and high-speed SerDes architecture for optical transceiver SoCs, defining solutions for drivers, TIAs, equalizers, ADC/DACs, PLLs, and CDRs targeting 112G/224G+ PAM4 and next-generation interconnects. Define and maintain Analog Product Requirement Specifications (PRS) per product, including architecture, verification plans, and performance, power, and area (PPA) estimates. Drive system-level link budget closure across the complete electrical-to-optical channel, accounting for transmitter impairments, channel loss, reflection, crosstalk, and receiver noise for Integrated Graphene Photonics (IGP)-enabled optical links. Own the Analog IP roadmap, aligning architecture direction with technology capabilities, EDA flows, and contractor/external