Principal FPGA Engineer

Jobtailor; Hamburg; Vor Ort; EUR 90.000 - 130.000; Vollzeit

Zusammenfassung

Jobtailor is seeking a senior FPGA/ASIC engineer in Hamburg, Germany, to define and drive our FPGA strategy and development flows. You will work with RTL teams and verification, bringing up prototypes and delivering scalable platforms for internal stakeholders.

The role requires 7+ years in FPGA/ASIC, strong SystemVerilog/Verilog/VHDL skills, and hands-on experience with Vivado, Synplify, ChipScope, ModelSim, and Xcelium. Collaboration across hardware and software teams is essential.

Qualifikationen

• 7+ years in FPGA/ASIC engineering.
• Strong RTL design experience with SystemVerilog/Verilog/VHDL.
• Hands-on with FPGA development and synthesis tools (Vivado/Synplify/ChipScope).
• Experience with Xilinx/AMD platforms; other vendors valued.

Aufgaben

• Define and drive FPGA strategy, methodologies, and development flows using leading FPGA technologies and best practices.
• Improve FPGA tools, methodologies, and design flows for efficiency and quality.
• Design, develop, and deploy FPGA-based prototyping and verification platforms for multiple internal teams.
• Debug FPGA designs and bring up systems using lab equipment and debugging tools (oscilloscopes, logic analyzers, JTAG).
• Collaborate with cross-functional teams to investigate issues, apply fixes, and develop workarounds.
• Create and maintain technical documentation including guides, defect reports, release notes, and project status updates.

Kenntnisse

FPGA/ASIC engineering

RTL design

SystemVerilog/Verilog/VHDL

FPGA tools (Vivado/Synplify/ChipScope)

Xilinx/AMD platforms

Timing constraints (SDC)

Simulation/verification (ModelSim/VCS)

Embedded software understanding

Scripting (Bash/Perl/Python/Tcl/CMake)

Protocols (AHB/AXI/I2C/I3C/SPI)

SWD debugging tools

Lab equipment debugging

Tools

Vivado

Synplify

ChipScope

ModelSim

VCS

Xcelium

Oscilloscopes

Logic Analyzers

JTAG Interfaces

SWD Debugging Tools

Jobbeschreibung

Responsibilities

• Define and drive FPGA strategy, methodologies, and development flows by leveraging industry‑leading FPGA technologies, tools and best practices to address diverse project requirements
• Contribute to the continuous improvement and evolution of FPGA tools, technologies, methodologies and design flows to enhance development efficiency and quality
• Design, develop, and deploy FPGA‑based prototyping and verification platforms, delivering scalable solutions that support internal stakeholders, including Verification, Validation, Firmware and Software teams
• Perform FPGA design debugging and system bring‑up using laboratory equipment and debugging tools such as oscilloscopes, logic analyzers, and JTAG interfaces
• Collaborate closely with cross‑functional teams, including design, verification, validation, firmware and software engineering to investigate issues, implement corrective actions and develop effective workarounds when required
• Create and maintain comprehensive technical documentation, including user guides, defect reports, release notes and project status updates

Requirements

• Proven track record of 7+ years in FPGA and/or ASIC engineering
• Strong expertise in RTL design and development using SystemVerilog, Verilog and VHDL
• Hands‑on experience with industry‑standard FPGA development and synthesis tools, including Vivado, Synplify and ChipScope
• Proven experience working with leading FPGA platforms, with a preference for Xilinx/AMD devices; experience with Lattice or Altera FPGA solutions is also highly valued
• Demonstrated ability to develop and implement timing constraints (SDC) and achieve timing closure for high‑speed FPGA designs
• Proficiency with simulation and verification tools such as ModelSim, VCS and Xcelium
• Comprehensive understanding of embedded software engineering processes and practical experience in software development and debugging for embedded CPU platforms
• Experience developing automation scripts and build environments using languages and tools such as Bash, Perl, Python, Tcl and CMake
• Solid understanding of industry‑standard on‑chip communication protocols, including AHB, AXI, I2C, I3C and SPI
• Strong hardware and software debugging skills, with hands‑on experience using laboratory equipment such as oscilloscopes, logic analyzers and SWD debugging tools
• Excellent verbal and written communication skills, with the ability to effectively collaborate across multidisciplinary and geographically distributed teams

Core Competencies

Expertise in FPGA and ASIC engineering with a strong focus on RTL design using SystemVerilog, Verilog, and VHDL. Proven ability to collaborate with cross‑functional teams and develop scalable FPGA‑based solutions while maintaining comprehensive technical documentation.

Tools & Technologies

• Vivado
• Synplify
• ChipScope
• ModelSim
• VCS
• Xcelium
• Oscilloscopes
• Logic Analyzers
• JTAG Interfaces
• SWD Debugging Tools