NPU Architect

Ignite Next GmbH; Dresden; Hybrid; EUR 90.000 - 130.000; Vollzeit

Zusammenfassung

Ignite Next GmbH in Dresden seeks a hardware/architecture engineer to design the next iteration of a 3D in-memory compute chip. You will collaborate with hardware, compiler and ML engineers to optimize ML workloads on capacitive analog in-memory matrix-vector units.

You will design core architecture modules, evaluate performance with software teams, and monitor AI workloads trends to guide future architectures. A strong EE/CS background and hands-on design experience are required.

Qualifikationen

• BS/MS/PhD in EE, CS, or a related field.
• Understanding in computer architecture, digital design, and micro-architecture concepts.
• Familiarity with AI/ML algorithms, frameworks, and workloads.
• Programming experience in C/C++ and Python.

Aufgaben

• Design and specify the structure and internal organisation of core architecture modules, aligned with workload requirements and software deployment processes.
• Partner with the software team to evaluate module performance and efficiency for key workloads, uncover performance constraints, and inform architectural choices.
• Monitor emerging trends and research in AI workloads, hardware architectures, and applications to guide the evolution of next-generation architectures.

Kenntnisse

Computer architecture

Digital design

Micro-architecture

C/C++

Python

Ausbildung

BS/MS/PhD in EE or CS

Tools

Timeloop

ZigZag

Verilog/SystemVerilog

Jobbeschreibung

In this role you'll be responsible to design the next iteration of SEMRON's 3D in-memory compute chip. You will collaborate with a team of hardware, compiler and ML engineers to optimise all aspects of executing ML workloads based on our capacitive analog in-memory matrix-vector multiplication units.

What you will do:

• Design and specify the structure and internal organisation of core architecture modules, aligned with workload requirements and software deployment processes.
• Partner with the software team to evaluate module performance and efficiency for key workloads, uncover performance constraints, and inform architectural choices.
• Monitor emerging trends and research in AI workloads, hardware architectures, and applications to guide the evolution of next-generation architectures.

What you should bring in:

• BS/MS/PhD in EE, CS, or a related field
• Understanding in computer architecture, digital design, and micro-architecture concepts
• Familiarity with AI/ML algorithms, frameworks, and workloads
• Programming experience in C/C++ and Python

Helpful but not required:

• Hands-On Experience with ML Hardware Exploration Frameworks like Timeloop, ZigZag, etc.
• Hands-On Experience with HDLs such as Verilog or System Verilog