FPGA RF Signal Processing Engineer (M/W/D)

ZeroPhase; Nordrhein-Westfalen; Vor Ort; EUR 85.000 - 120.000; Vollzeit

Zusammenfassung

ZeroPhase is seeking a Senior FPGA RF Signal Processing Engineer to bridge RF theory, DSP algorithms, and high-performance FPGA implementation for a software-defined radio used in unmanned platforms.

You will translate floating-point models into fixed-point simulations and real-time HDL, supporting bring-up and validation on hardware in real RF conditions, and documenting your work for the team.

Qualifikationen

• 5+ years of professional FPGA development for RF/DSP.
• Translate prototype algorithms into working FPGA implementations.
• Strong HDL knowledge and FPGA system architecture.

Aufgaben

• Design, simulate, and implement DSP algorithms for communications.
• Implement and optimise HDL for real-time FPGA execution; prototyping in Python/MATLAB.
• Develop floating-point and fixed-point models and validate with simulations.
• Collaborate with RF and embedded software engineers for bring-up and calibration.
• Support FPGA bring-up and validation against real signal conditions.
• Document designs, specs, and test reports for the team.

Kenntnisse

HDL

FPGA development

DSP algorithms

Python

MATLAB

VHDL

Verilog

SystemVerilog

German & English

Ausbildung

Bachelor's degree in EE/CE/Physics

Tools

FPGA

Jobbeschreibung

As a Senior FPGA RF Signal Processing Engineer, you will work at the intersection of RF theory, DSP algorithm design, and high-performance FPGA implementation to deliver the signal-processing core of a software-defined radio built for uncrewed platforms. You will take algorithms from floating-point models through fixed-point simulation to real-time HDL, and see them through to bring-up and validation on real hardware, in real RF conditions. If you want your DSP work to end up flying, not just simulating, we want to hear from you.

What you'll do

• Design, simulate, and implement DSP algorithms for communications applications: modulation and demodulation, channel coding, synchronisation, equalisation, and channel estimation.
• Implement and optimise these algorithms as HDL (VHDL/Verilog/SystemVerilog) for real-time execution on FPGA, and support prototyping in Python/MATLAB ahead of the hardware port.
• Develop floating-point and fixed-point models, and run simulations to validate system and modem performance before committing to hardware.
• Work closely with our RF and embedded software engineers on instrument bring-up, calibration routines, and full system integration.
• Support FPGA bring-up and validation by developing and executing system test plans in the lab, against real signal conditions, not just testbenches.
• Author the technical documentation, design specifications, and test reports that let the rest of the team build on your work.

What we're looking for

• Bachelor's degree in electrical engineering, computer engineering, physics, or a related field.
• 5+ years of professional experience in FPGA development for RF/DSP, and in translating prototype algorithms into working FPGA implementations.
• Practical experience in some of the following: spectrum monitoring, signal intelligence, modulation/demodulation, filtering, channel estimation, equalisation, synchronisation, or AGC.
• Strong command of HDL (VHDL/Verilog/SystemVerilog) and FPGA system architecture and design flows.
• A systems-level mindset that connects RF physics, DSP mathematics, and FPGA implementation, rather than treating them as separate disciplines.
• Comfortable working closely with a small, interdisciplinary team, and documenting your own designs clearly enough for others to pick up.
• Professional fluency in German & English.