Intern, Digital IC Design & MCU Prototyping

onsemi; Marin-Epagnier; Vor Ort; CHF 20.000 - 27.000; Teilzeit

Zusammenfassung

onsemi in Marin, Switzerland offers a 6-month internship in our design team. You will simulate and evaluate state-of-the-art microcontrollers, build a MCU subsystem, and verify it in C/C++ on FPGA.

Join a team delivering ultra-low power digital architectures, collaborate with verification and physical design teams, and gain hands-on industry experience with competitive pay and flexible academic scheduling.

Qualifikationen

• Master’s program in Electrical Engineering or related field.
• Knowledge in digital IC design and computer architecture.
• Experience with HDL languages (Verilog/SystemVerilog/VHDL) for RTL design.
• Understanding of pipelining, memory hierarchies, low-power design, and digital system integration.
• Familiarity with simulation and verification methodologies.
• Basic knowledge of FPGA prototyping flows is a plus.
• Good communication skills (English).
• Strong team player with a collaborative mindset.
• Eligibility to work in Switzerland.

Aufgaben

• Contribute to design and optimization of digital architectures for low-power SoCs.
• Develop and implement RTL modules using SystemVerilog/Verilog.
• Perform functional simulation, verification, and debugging of digital designs.
• Participate in integration of digital subsystems within a larger SoC environment.
• Support FPGA-based prototyping and validation of digital designs.
• Collaborate with cross-functional teams including verification, physical design, and system architects.

Kenntnisse

SystemVerilog

Verilog

VHDL

Digital IC design

RTL design

FPGA prototyping

English

Team player

Ausbildung

Master’s program in Electrical Engineering

Tools

Linux shell

Jobbeschreibung

onsemi in Marin, Switzerland offers a 6-month internship in our design team. You will simulate and evaluate state-of-the-art microcontrollers, build a MCU subsystem, and verify it in C/C++ on FPGA.

Join a team delivering ultra-low power digital architectures, collaborate with verification and physical design teams, and gain hands-on industry experience with competitive pay and flexible academic scheduling.