Staff SoC DV Engineer: Pre-Silicon DFD/DFT Verification

Tenstorrent University Jobs; Toronto; Hybrid; CAD 143,000 - 713,000; Full time

Job summary

Tenstorrent is seeking an engineer to focus on pre-silicon verification of DFD logic for AI SoCs. The role supports hybrid work arrangements across locations including Boston, MA; Toronto, Ottawa; or Santa Clara, CA, with offers aligned to level and experience.

You will develop verification environments, write test scenarios for scan and MBIST, analyze coverage, and collaborate with DFT/RTL teams. Strong scripting and automation experience is valued.

Qualifications

• Deeply curious about silicon debug/test infrastructure.
• Expert in UVM and verification of DFD/DFD features, scan, and on-chip trace logic.
• Familiar with Siemens Tessent flows, iJTAG, and advanced verification automation.
• Proactive, detail-oriented, and thrives in cross-functional technical discussions.
• Ideally familiar with tools similar to CocoTB.

Responsibilities

• Develop and own verification environments for DFD logic across AI chiplets and SoCs.
• Write, refine, and execute test scenarios for scan, MBIST, array dump, and clock-stop features.
• Analyze coverage gaps, debug failures, and collaborate closely with DFT and RTL teams.
• Automate flows for JTAG/scanchain testing and integrate AI productivity tools.

Skills

UVM verification

DFD/DFT verification

Scan chain testing

On-chip trace logic

Cross-functional collaboration

Tools

Siemens Tessent

iJTAG

CocoTB

Job description

Tenstorrent is seeking an engineer to focus on pre-silicon verification of DFD logic for AI SoCs. The role supports hybrid work arrangements across locations including Boston, MA; Toronto, Ottawa; or Santa Clara, CA, with offers aligned to level and experience.

You will develop verification environments, write test scenarios for scan and MBIST, analyze coverage, and collaborate with DFT/RTL teams. Strong scripting and automation experience is valued.