Staff Analog Design Engineer - Precision Timing & PLLs

Sitime-Corporation

Ottawa

On-site

CAD 114,000 - 157,000

Full time

14 days+

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Benefits offered by this job

Quarterly bonus
Equity grants

Job summary

SiTime is looking for a Staff Analog Design Engineer to join a talented analog design team developing advanced clock and timing products. You will lead the development of key circuit blocks from specification through proven silicon.

This role requires a solid understanding of top-level architecture and system-level requirements. You will collaborate closely with product development teams and support validation, qualification, and new product release.

Qualifications

  • Master's or PhD in Electrical Engineering.
  • 6+ years of analog/mixed-signal IC design experience.
  • CMOS and/or BiCMOS IC design experience.
  • Strong knowledge of IC design, device physics, and advanced process technologies.
  • Experience designing PLLs or related blocks (VCOs, phase detectors, charge pumps).
  • Understanding of transistor behavior, circuit noise, and phase-noise concepts.
  • Proficiency with Cadence analog/mixed-signal tools.
  • Familiarity with analog/mixed-signal design flow, simulation methods, and post-layout verification.
  • Experience with SystemVerilog, Verilog-A, and AMS.
  • Hands-on lab test and characterization experience.

Responsibilities

  • Develop specifications and design analog circuits for high-performance timing products.
  • Incorporate circuit blocks into the complete chip design.
  • Collaborate with distributed cross-functional teams (layout, digital, system design, validation).
  • Test, debug, and characterize lab prototypes.
  • Support product validation and customer applications.

Skills

CMOS BiCMOS IC design
PLL design
Analog/mixed-signal circuit design
Circuit noise theory
Phase-noise concepts
SystemVerilog/Verilog-A/AMS

Education

Master's degree in Electrical Engineering
PhD in Electrical Engineering

Tools

Cadence analog/mixed-signal toolset
SystemVerilog/Verilog-A
AMS and post-layout verification

Job description

SiTime is looking for a Staff Analog Design Engineer to join a talented analog design team developing advanced clock and timing products. You will lead the development of key circuit blocks from specification through proven silicon.

This role requires a solid understanding of top-level architecture and system-level requirements. You will collaborate closely with product development teams and support validation, qualification, and new product release.

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