Staff Analog Design Engineer

SiTime; Ottawa; On-site; CAD 114,000 - 157,000; Full time

Job summary

SiTime is seeking a Staff Analog Design Engineer to join our analog design team developing advanced clock and timing products in Ottawa. You will lead development of key circuit blocks from specification through silicon, and collaborate with product teams to support validation, qualification, and new product releases.

Ideal candidates have 6+ years of analog/mixed-signal IC design, strong CMOS/BiCMOS experience, and proficiency with Cadence tools.

Qualifications

• Master’s or PhD in Electrical Engineering.
• 6+ years analog/mixed-signal IC design experience.
• Proven CMOS and BiCMOS design experience.
• Strong knowledge of IC design, device physics, and process tech.
• Experience designing PLLs or related blocks (VCOs, phase detectors, charge pumps).
• Solid understanding of transistor behavior and phase-noise concepts.
• Proficiency with Cadence analog/mixed-signal tools.
• Familiarity with analog/mixed-signal design flow, verification methods.
• Experience with SystemVerilog, Verilog-A, and AMS.
• Hands-on lab test and characterization experience.

Responsibilities

• Develop specifications and design analog circuits for high-performance timing products.
• Incorporate circuit blocks into the complete chip design.
• Collaborate with cross-functional teams including layout, digital, system design, validation.
• Test, debug, and characterize lab prototypes.
• Support product validation and customer applications.

Skills

CMOS design

BiCMOS design

Analog/mixed-signal

PLL design

SystemVerilog

Verilog-A

AMS

Education

MS in Electrical Engineering

PhD in Electrical Engineering

Tools

Cadence toolset

Verilog-A

AMS

Job description

About SiTime

SiTime is the Precision Timing company.

Timing is the heartbeat of all electronics, ensuring performance, resilience and scalability. For decades, quartz devices, non-silicon technology, have kept systems in sync, but they struggle in harsher, more demanding environments.

MEMS-based Precision Timing delivers greater accuracy, smaller size and resilience. Today, MEMS timing powers over 400 applications, including high-growth ones in AI datacenters, automated driving, industrial and humanoid robots, wearables and IoT.

Our semiconductor MEMS programmable solutions offer a rich feature set that enables customers to differentiate their products with higher performance, smaller size, lower power, and better reliability. With more than 4 billion devices shipped, SiTime is changing the timing industry. For more information, visit: www.sitime.com.

Job Summary

SiTime is looking for a Staff Analog Design Engineer to join a talented analog design team developing advanced clock and timing products. You will lead the development of key circuit blocks from specification through proven silicon. This role requires a solid understanding of top-level architecture and system-level requirements. You will collaborate closely with product development teams and support validation, qualification, and new product release.

Responsibilities

• Develop specifications and design analog circuits for high-performance timing products


• Incorporate circuit blocks into the complete chip design


• Collaborate with distributed cross-functional teams, including layout, digital, system design, and validation


• Test, debug, and characterize lab prototypes


• Support product validation and customer applications

It is not necessary to meet all job requirements to be a qualified candidate for the position.

Qualifications & Requirements

• Master’s or PhD degree in Electrical Engineering.


• 6+ years of relevant analog/mixed-signal IC design experience.


• Proven experience in CMOS and/or BiCMOS IC design.


• Strong knowledge of integrated circuit design, device physics, and advanced process technologies


• Experience designing PLLs or related blocks such as VCOs, phase detectors, charge pumps, and supporting circuits


• Solid understanding of transistor behavior, circuit noise theory, and phase-noise concepts


• Proficiency with the Cadence analog/mixed-signal simulation toolset


• Familiarity with analog/mixed-signal design flow, simulation methods, design rules and post-layout verification


• Experience with analog behavioral modeling, SystemVerilog, Verilog-A, and AMS


• Hands-on lab test and characterization experience

Desired Characteristics & Attributes

• Collaborative, self-motivated, and positive team contributor


• Able to empower others and provide effective mentorship


• Strong analytical and problem-solving skills

Compensation Range

At SiTime, we believe great work deserves great rewards. We offer a comprehensive and highly competitive compensation package designed to attract top talent.

The annual base salary range for this role is CAD$ 114,210 - 157,040. The final offer is determined by factors such as location, experience, education, and training.

In addition to base salary, this role is eligible for a quarterly bonus tied to the achievement of innovation goals—reflecting our commitment to recognizing meaningful impact. We also offer equity grants, providing a meaningful opportunity to share in the company’s future growth and success.

SiTime is an Equal Opportunity Employer . We treat each person fairly and we do not tolerate discrimination or harassment against anyone on the basis of any protected characteristics, including race, color, religion, national or ethnic origin, sex, sexual orientation, gender identity or expression, age, disability, pregnancy, political affiliation, protected veteran status, protected genetic information, or marital status or other characteristics protected by law. SiTime participates in the E-Verify program.

Learn More about SiTime

Review the Get to Know SiTime section of our career page to explore our culture, values, and what makes us unique.

• Innovation on Top – Philosophies of Innovation with Rajesh Vashist


• Fabrication Knowledge – An Interview with Rajesh Vashist


• SiTime Corporation – YouTube

SiTime is an Equal Opportunity Employer . We treat each person fairly and we do not tolerate discrimination or harassment against anyone on the basis of any protected characteristics, including race, color, religion, national or ethnic origin, sex, sexual orientation, gender identity or expression, age, disability, pregnancy, political affiliation, protected veteran status, protected genetic information, or marital status or other characteristics protected by law. SiTime participates in the E-Verify program.