Sr Firmware Design Engineer - 7364

Synopsys, Inc.; Mississauga; On-site; CAD 70,000 - 90,000; Full time

Job summary

A leading company in chip design and software security is seeking a digital verification engineer. This role offers opportunities to work with next generation technologies, engaging with outstanding engineers to ensure high-quality deliverables. The ideal candidate will have a strong educational background and some industry experience, ready to contribute to innovative projects in a dynamic environment.

Qualifications

• Up to 2 years in digital verification.
• Experience writing testcases in Verilog and SystemVerilog.
• Strong debugging skills with complex issues.

Responsibilities

• Defining and tracking Verification Testplans.
• Writing SystemVerilog testbenches using UVM.
• Debugging RTL and gate-level simulation failures.

Skills

Digital verification

Verilog

SystemVerilog

Debugging

Software Tools

Scripting languages

Education

MS in Electrical/Computer Engineering

Tools

Jira

Job description

Role Description:

Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.

Seeking a highly motivated individual to join our PHY Digital Design Verification team based in Markham or Mississauga or Ottawa, Canada. The candidate will be involved in verifying next generation PCIe, Ethernet and Optical SERDES products. The position offers an excellent opportunity to work with digital and mixed signal design engineers responsible for delivering high-end mixed-signal designs.

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

Responsibilities:

• Defining and tracking Verification Testplans
• Designing and writing constrained-random SystemVerilog testbenches using a Verification Methodology such as UVM (Universal Verification Methodology)
• Creating and examining Functional Coverage
• Writing SystemVerilog assertions
• Debugging RTL and gate-level simulation failures
• Firmware Debug
• Bug Tracking using Software Tools such as Jira
• Code Coverage Analysis

Skills required:

• MS in Electrical/Computer Engineering or related fields with <2 years of industry experience in digital verification
• Experience in writing testcases in Verilog and System Verilog
• Experience in debugging complex testbench and design related issues
• Solid understanding of digital circuit design
• Familiarity with scripting languages (Python or Perl)
• Self-learner, independent, good organization and communication skills