Senior IC Verification Engineer – Ethernet IP & SoC

NXP Semiconductors; Canada; Hybrid; CAD 111,000 - 152,000; Full time

Benefits offered by this job

Health benefits

Dental

Vision

RRSP

Equity or incentive compensation

Job summary

NXP Semiconductors Kanata site seeks a Senior IC Design Verification Engineer to verify Ethernet/networking IP for next-generation SoCs in automotive, IoT, and edge markets. You will architect UVM environments, perform trade-off analyses, and collaborate across IP teams to ensure timely, high-quality IP delivery.

The role requires 5+ years in IP/SoC verification, strong SystemVerilog/UVM expertise, and scripting skills.

Qualifications

• 5+ years of IP & SoC verification experience.
• Strong knowledge of SystemVerilog and UVM verification.
• Experience with verification tools and scripting (Python, TCL, Perl).
• Familiarity with DV infrastructure, design verification, and test planning.
• Proactive communicator with strong documentation skills.

Responsibilities

• Verify Ethernet/networking IP for next-generation SoCs in automotive, industrial, and edge markets.
• Architect and implement UVM-based verification environments for IP/SoC.
• Conduct performance/complexity trade-off analyses and optimize verification strategies.
• Collaborate with IP architecture, design, and verification teams to ensure on-time delivery and high quality.
• Produce detailed IP specifications and test plans; create directed and constrained random tests.
• Debug failures, drive root-cause analysis, and aid in defect resolution.
• Review coverage metrics and extend tests to meet coverage targets.
• Drive continuous improvements in verification methodologies.

Skills

SystemVerilog

UVM

IP/SoC verification

Python scripting

EDA tools

Git

Trade-off analysis

Documentation

Team player

Education

Bachelor's degree in Computer Science, Engineering, or related field

Tools

Git

EDA tools

Job description

NXP Semiconductors Kanata site seeks a Senior IC Design Verification Engineer to verify Ethernet/networking IP for next-generation SoCs in automotive, IoT, and edge markets. You will architect UVM environments, perform trade-off analyses, and collaborate across IP teams to ensure timely, high-quality IP delivery.

The role requires 5+ years in IP/SoC verification, strong SystemVerilog/UVM expertise, and scripting skills.