Senior Digital/FPGA Engineer

Per Vices Corporation; Toronto; On-site; CAD 90,000 - 130,000; Full time

Job summary

Per Vices Corporation seeks an engineer to help build Software Defined Radios (SDRs) for mission critical infrastructure. You will design, simulate, implement, and validate FPGA-based architectures interfacing with high-speed IOs such as ADCs, DACs, and clock signals to process data and transmit over JESD204B/C and 10/40/100G Ethernet.

Documentation of changes and collaboration with the team are essential. The role emphasizes Verilog/VHDL, digital test bench work, Linux proficiency, and C/C++

Qualifications

• Experience with Verilog or VHDL and digital test bench creation, simulation, and maintenance.
• Working knowledge of Linux-based distributions.
• Proficiency in C or C++ for software-hardware integration.

Responsibilities

• Design FPGA-based architectures interfacing with high-speed IOs (ADC, DAC, clock).
• Implement and validate data processing blocks (filters, decimation, interpolation).
• Simulate and verify against JESD204B/C and 10/40/100G Ethernet interfaces.
• Document design changes and communicate status to the team.

Skills

Verilog

VHDL

Digital test bench

Linux

C/C++

Tools

iverilog

Verilator

Job description

We are looking for an engineer to help us build Software Defined Radios (SDRs) for mission critical infrastructure. Our products use FPGAs to provide a high performance interface between data provided over a high speed bus (10/40/100G Ethernet), our internal IP, and high speed converter (DACs/ADCs) devices. Your primary responsibilities require you to design, simulate, implement, and validate, FPGA based architectures that interface with high speed IOs (ADC, DAC, clock) to effectively process that data (filtering, decimating, interpolating), and pass that data over a high speed busses (JESD204B/C, 10/40/100G Ethernet). This position also requires engineers to effectively document and communicate design changes, updates, challenges, to other engineers and a broader team.

Mandatory Qualifications

Experience in all of the following areas:

• Experience with Verilog (preferred) or VHDL
• Digital Test bench creation, simulation, and maintenance
• Experience with Linux based distributions
• Working knowledge of C or C++

Experience directly implementing and debugging in at least three of the following areas:

• High speed (>325MSPS) Digital and Analog Converter Interfaces (JESD204B/C, LVDS, etc.)
• DDR3/4 Memory Controllers (>1800MT/s)
• Complex test bench creation using iverilog or verilator
• FPGA integration with SoC devices, external chipsets, processors, and/or microcontrollers

Optional Qualifications

The following skills are desired but not necessarily required for the position:

• FPGA integration with SDR systems
• Ethernet protocol implementations (ie; VITA-49 over UDP)
• Working in a Linux computing environment.
• Previous work with Schematic Capture and PCB Layout
• Understanding of wireless radio and DSP chains
• Mixed signal board layout and schematic capture
• Open source radio projects (ie; OpenBTS, UHD, Yocto)