Senior ASIC Verification Engineer - Inference Accelerator (Equity)

NVIDIA Corporation; Canada; Remote; CAD 155,000 - 245,000; Full time

Job summary

NVIDIA Canada is seeking a seasoned ASIC Verification Engineer to verify inference accelerators. You will verify ASICs across unit, block and SoC levels using SystemVerilog, UVM, and automated verification flows within a global team.

Requirements: a bachelor in EE/CS/CE and 8+ years of verification experience; strong debugging, random stimulus, functional coverage and assertions; experience with VCS or Verdi. UPF power verification and DFT knowledge are a plus.

Qualifications

• Bachelor's degree in EE/CS/CE (or equivalent).
• 8+ years of verification experience in industry.
• Experience with random stimulus, functional coverage and assertions.
• SystemVerilog and UVM expertise.
• Tools: VCS, Verdi; UPF power verification and DFT knowledge are a plus.
• Knowledge of ASIC design flow; basic ML concepts in verification are beneficial.

Responsibilities

• Verify the design and implementation of inference accelerators across unit, block and SoC levels.
• Verify ASIC design, architecture, reference models and micro-architecture.
• Define verification scope, develop infrastructure and automate flows.
• Collaborate with architects, designers and verification teams to complete tasks.
• Implement and optimize automated verification flows to improve productivity.
• Stay updated on trends and advancements in ASIC design verification.

Skills

SystemVerilog

UVM

Assertion-based verification

Functional coverage

Random stimulus

C/C++

Python/Perl

ML in verification

Education

Bachelor's degree in EE/CS/CE

Tools

VCS

Verdi

Job description

NVIDIA Canada is seeking a seasoned ASIC Verification Engineer to verify inference accelerators. You will verify ASICs across unit, block and SoC levels using SystemVerilog, UVM, and automated verification flows within a global team.

Requirements: a bachelor in EE/CS/CE and 8+ years of verification experience; strong debugging, random stimulus, functional coverage and assertions; experience with VCS or Verdi. UPF power verification and DFT knowledge are a plus.