Hands-on ASIC Verification Engineer for AI Networking IP

AMD

Ottawa

On-site

CAD 90,000 - 120,000

Full time

8 days ago

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Job summary

AMD is seeking an ASIC Verification Engineer to join our Ottawa, Canada team, developing high‑performance networking and AI‑ready IP for leading‑edge devices. You’ll contribute to verification environments and reusable IP components, shaping the future of AMD silicon.

You will write tests, sequences, and testbenches in SystemVerilog and UVM, pursue coverage‑driven verification, and collaborate with digital designers, software engineers, and tooling experts to deliver robust, scalable solutions.

Qualifications

  • Bachelor's or Master's degree in computer engineering/Electrical Engineering.
  • Experience with SystemVerilog and C/C++ is preferred.
  • Familiarity with verification methodologies and scripting is a plus.

Responsibilities

  • Contribute to the development of advanced, reusable verification environments and IP components
  • Investigate and root cause issues found during the IP development stage
  • Write tests, sequences, and testbench components in SystemVerilog and UVM to verify the design
  • Employ a Coverage-Driven Verification methodology with Constrained Random Stimulus
  • Contribute to process improvements via automation of tasks and exploring and evaluating new tools and methodologies
  • Drive formal verification for the block and write formal properties and assertions to verify the design

Skills

Digital design principles
Object oriented coding practices
SystemVerilog
C/C++ programming
Python scripting

Education

Bachelor's or Master\'s in computer engineering/Electrical Engineering

Tools

Claude Code
Codex

Job description

AMD is seeking an ASIC Verification Engineer to join our Ottawa, Canada team, developing high‑performance networking and AI‑ready IP for leading‑edge devices. You’ll contribute to verification environments and reusable IP components, shaping the future of AMD silicon.

You will write tests, sequences, and testbenches in SystemVerilog and UVM, pursue coverage‑driven verification, and collaborate with digital designers, software engineers, and tooling experts to deliver robust, scalable solutions.

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