Security IP Verification Architect

Arm Limited

Toronto

On-site

CAD 126,000 - 170,000

Full time

14 days+

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Job summary

Arm Limited is seeking Design Verification Engineers to join our Security IP Team. You will design verification plans, develop testbenches (UVM), and verify cryptography, key management, and secure boot for high‑assurance SoCs.

We value collaboration, problem-solving, and mentoring others within an agile security-focused environment, with opportunities to impact next‑generation Arm designs and security methodologies.

Qualifications

  • Bachelor’s or Master’s degree in CS or Electrical/Computer Engineering with 5+ years in design or verification.
  • Solid understanding of Verilog HDL and verification strategies (SystemVerilog UVM, C, Formal).
  • Experience in Security Hardware, Embedded Processor Systems, Cryptography, Secure Boot, and Key Management.
  • Experience with multi-clock domain designs, AXI/AHB protocols, power and reset architectures.
  • Low-level programming in C/Assembler; firmware debugging and tarmac logging.

Responsibilities

  • Define and realize Hardware Security IP and Subsystem; develop test plans and testbenches.
  • Develop verification models and strategies; partner with design for sign-off and optimization.
  • Mentor team members and collaborate with Project Management on initiatives and schedules.

Skills

Verilog HDL
SystemVerilog UVM
C
Formal verification
Hardware/Firmware co-verification
Security hardware verification
Embedded processor systems
ARM-based designs
Digital IP/SoC verification
Scripting: Python/Perl

Education

Bachelor's or Master’s degree in Computer Science or Electrical/Computer Engineering

Tools

UVM
Verilog
SystemVerilog
C testbenches

Job description

Arm Limited is seeking Design Verification Engineers to join our Security IP Team. You will design verification plans, develop testbenches (UVM), and verify cryptography, key management, and secure boot for high‑assurance SoCs.

We value collaboration, problem-solving, and mentoring others within an agile security-focused environment, with opportunities to impact next‑generation Arm designs and security methodologies.

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