Research Engineer - Network Processor

Huawei; Ottawa; On-site; CAD 80,000 - 140,000; Full time

Job summary

An established industry player is seeking a Research Engineer to join their innovative team focused on semiconductor solutions. This role involves researching and developing new algorithms and architectures to enhance programmability, power, performance, and area of microarchitectures. The ideal candidate will possess a Ph.D. in a relevant field and have a strong background in networking protocols and CPU microarchitecture. Join a forward-thinking company where your contributions will drive advancements in smart devices and mobility solutions, making a significant impact in the semiconductor industry.

Qualifications

• Ph.D. in relevant field with experience in Networking and CPU microarchitecture.
• Strong knowledge of scripting languages and modern CPU design.

Responsibilities

• Research new algorithms and architectures through literature and customer interaction.
• Propose and document architectural alternatives to improve performance and efficiency.

Skills

Networking protocols

CPU microarchitecture

ASIC design

Performance modeling

C/C++ programming

Python scripting

Queuing theory

Real-time embedded programming

Education

Ph.D. in Electrical or Computer Engineering

Master's in Computer Science or related field

Job description

Huawei Canada has an immediate permanent opening for a Research Engineer.

About the team:

Initially founded in 1991 as Huawei's ASIC Design Center, the IC Lab is a leading global fabless semiconductor lab. This lab delivers trusted, cutting-edge semiconductor products and services for smart devices, contributing to smart home and mobility solutions. The local team in Canada specializes in semiconductors, and chipset solutions.

About the job:

• Researching new algorithms and architectures through academic literature surveys, competitive analysis, customer interaction, and application of good engineering practices.

• Understanding product in order to identify their characteristics, and performance bottlenecks.

• Proposing, developing, and documenting new architectural alternatives which improve the Programmability, Power, Performance, and Area (P3A) of Huawei’s existing. Microarchitectures.

• Recognizing areas which can be optimized to improve the power, performance, and area (PPA) of the processor.

• Working with the Microcode and Compiler teams to develop, tune, and demonstrate the benefits of the architectural enhancements.

• Working with the Modeling and Optimization architects and implementation teams to ensure the successful delivery of the processing core which meets prescribed programmability, performance, power, and area targets.

About the ideal candidate:

• Ph.D. in Electrical or Computer Engineering, Computer Science, or related field with experience in Networking, CPU microarchitecture, ASIC design, and performance modeling is desired.

• Strong experience with modern networking protocols and the forwarding packets using Match/Action processing.

• Expertise in modern CPU microarchitecture and instruction sets, including Cache structures and algorithms, Branch prediction algorithms, Network Processor microarchitecture, and system design is an asset.

• Expertise in ASIC design, verification, and PD challenges, and how architectural decisions influence these activities.

• Experience with C, C++, or similar high-level programming language is an asset.

• Strong knowledge of scripting languages such as Python, etc.; Implementing complex algorithms in hardware

• Knowledge of Queuing theory, complex arbitration, and flow control.

• Knowledge of real-time embedded programming, deadlocks, and race conditions.