Principal SoC I/O Performance Architect

AMD; Vancouver; On-site; CAD 180,000 - 240,000; Full time

Benefits offered by this job

AMD benefits at a glance

Job summary

AMD seeks a Principal I/O Performance Architect in Vancouver to define and optimize I/O performance across next‑generation SoCs, from pre‑silicon modeling to post‑silicon validation. You will shape bandwidth, latency, QoS targets, and drive architectural decisions with data‑driven evidence.

You’ll lead cross‑team efforts across architecture, design, DV, emulation, firmware and software, developing scalable workloads and automated workflows to accelerate exploration and decision making.

Qualifications

• Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline—or equivalent practical experience.
• Candidates with different but relevant backgrounds are encouraged to apply.

Responsibilities

• Define performance objectives, analysis methods, and sign‑off criteria for SoC I/O subsystems.
• Build and apply performance models to evaluate architectural options with data‑driven recommendations.
• Analyze performance data from models, simulation, emulation, tests, traces, and counters against RTL and post‑silicon results.
• Create reusable workloads, traffic patterns, trace‑replay methods, KPI correlations, and scalable benchmarks.
• Partner with architecture, DV, emulation, firmware, software, validation, and platform teams; communicate trade‑offs clearly.
• Develop automation and AI‑assisted workflows to speed up analysis and model exploration.

Skills

Performance modeling

Data-driven decisions

Technical leadership

Cross-team collaboration

Education

Bachelor’s/Master’s/PhD in E.E. / C.E. / C.S.

Tools

PCIe

CXL

IOMMU/SMMU

UCIe

AXI / CHI

DMA engines

C++

Python

SystemC/TLM

Job description

At AMD, our mission is to build great products that accelerate next‑generation computing experiences—from AI and data centers to PCs, gaming, and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity, and a shared passion for creating something extraordinary. When you join AMD, you’ll discover that our culture is the real differentiator. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. We shape the future of AI and beyond.

Role

AMD is seeking a Principal I/O Performance Architect to define and optimize I/O performance across next‑generation SoCs—before silicon exists and after it returns from the fab. You will define what ‘fast enough’ means for bandwidth, latency, and QoS, build the models and experiments that prove it, and use that evidence to steer architecture and design decisions across the company. This rare seat sits at the intersection of architecture, modeling, verification, emulation, firmware/software, and post‑silicon analysis. Your work will shape the performance strategy of cutting‑edge AMD technologies from early concepts through silicon and into platforms.

Key Responsibilities

• Define performance objectives, analysis methods, and sign‑off criteria for SoC I/O subsystems—bandwidth, latency, QoS, ordering, flow control, topology, and congestion.
• Build, extend, and apply performance models to evaluate architectural options early and answer design questions with data‑driven recommendations.
• Analyze performance data from models, simulation, emulation, firmware/software tests, traces, and counters, and correlate pre‑silicon predictions against RTL, emulation, and post‑silicon results.
• Create reusable workloads, synthetic traffic patterns, trace‑replay methods, benchmark flows, and KPI‑correlation techniques that scale across teams.
• Partner with architecture, design, DV, emulation, firmware, software, validation, and platform teams, communicating trade‑offs clearly in reviews, readouts, and written recommendations.
• Develop automation and AI‑assisted workflows to speed sweeps, data reduction, triage, report generation, and model‑based exploration.

Preferred Experience

• Familiarity with high‑performance I/O, interconnect, memory, and coherency technologies such as PCIe, CXL, IOMMU/SMMU, UALink, Ethernet, InfiniBand, NVLink, UCIe, AXI, CHI, coherent fabrics, or DMA engines.
• Hands‑on experience building or using performance models—analytical, event‑driven, or transaction‑level—with C++, Python, or SystemC/TLM.
• Comfort working with performance data from simulation, emulation, firmware/software tests, traces, counters, benchmarks, and silicon debug tools.
• Demonstrated technical leadership, cross‑team influence, and a track record of using performance evidence to shape product or silicon direction.

Academic Credentials

Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline—or equivalent practical experience. Candidates with different but relevant backgrounds are encouraged to apply.

Location

Vancouver, British Columbia

Benefits

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal‑opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.