RTL Design Engineer

Advanced Micro Devices; Ottawa; On-site; CAD 120,000 - 170,000; Full time

Job summary

Advanced Micro Devices in Vancouver, BC seeks a seasoned RTL design engineer to contribute to chiplet interconnect IP development for servers and client devices. You will work on high‑performance digital blocks, multi‑clock domains, and close collaboration with DFT, verification, and firmware teams.

The role emphasizes design optimization for area, power and timing, with experience in USB/PCIe/CXL, Python/Perl scripting, and documentation.

Qualifications

• Master’s or Bachelor’s degree in electrical engineering or equivalent preferred.
• Strong RTL design experience and multi-clock domain awareness.
• Experience with I/O protocols (USB, PCIe, CXL) and high‑performance designs.

Responsibilities

• Develop RTL for digital blocks and micro-architecture.
• Collaborate with DFT, verification, firmware, and implementation teams.
• Document designs and present results to stakeholders.
• Optimize designs for area, power, and performance.
• Support bring-up and post-silicon debugging.

Skills

I/O Protocols

RTL Design

Multi-clock

Debugging

Documentation

Cross-functional

Education

Master/Bachelor in EE

Tools

Python/Perl

Synthesis Tools

STA

Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next‑generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

THE ROLE

This role is an excellent opportunity to work on the cutting‑edge next‑generation technologies that will be part of future AMD Microprocessors powering servers and personal computers as well as graphics cards and VR sets. You will join one of the fastest‑growing fields of Chiplet Interconnect technology rapidly being adopted across the VLSI industry. The team works on supporting both AMD proprietary I/O protocols and is also a key driver for industry standard Universal Chiplet Interconnect Express (UCIe) and Ultra Accelerator Link (UALink). The IP portfolio caters to short‑ultra‑short reach die‑to‑die interconnect with different bounding boxes tied to beachfront, power, BER requirements. As a member of this team, you get a chance to work on IP development, drive design‑specification, work on digital design and collaborate in the whole spectrum of areas including DFT, firmware, design verification, and physical design.

THE PERSON

Enjoys being an environment where they can grow and learn with sense of team spirit. Strong analytical thinking and problem‑solving skills, excellent attention to detail. Eager to learn new designs and implementation techniques. Must have good collaboration and interpersonal skills. Excellent communication skills with leadership qualities.

KEY RESPONSIBILITIES

• Experience with I/O protocols like USB, PCIe, CXL.
• Experience in developing micro‑architecture for any given module.
• RTL design experience with multi‑clock, high‑frequency designs, low latency, low power & high performance.
• Debugging/Post Silicon Bring up.
• Good documentation and presentation skills.
• Micro‑architecture of simple to complex digital blocks.
• RTL development using best industry practices.
• Optimize design for key metrics like area, power, performance, etc.
• Ability to work with cross‑functional teams like DFT, implementation, verification, emulation, firmware regularly.

PREFERRED EXPERIENCE

• Experience in digital front‑end implementation, including micro‑arch. definition.
• Experience with scripting/automation languages like Python/Perl.
• Firmware on hardware‑firmware co‑design.
• Experience with state‑of‑the‑art industry standard digital tools.
• Preferred experience in design with multiple clock domains.
• RTL design experience with multi‑clock, high‑frequency designs.
• Knowledge in digital RTL digital design and implementation.
• Experience with synthesis, equivalence checking, clock‑domain crossing (CDC) analysis, area/power optimizations, linting, static timing analysis (STA).

ACADEMIC CREDENTIALS

Master’s/Bachelor’s in electrical engineering or equivalent preferred.

LOCATION

Vancouver, BC (Open to Markham, ON)

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.