Logic Design Engineer

NXP Semiconductors

Ottawa

In loco

CAD 72.000 - 99.000

Tempo pieno

5 giorni fa
Candidati tra i primi

Aumenta le possibilità di ricevere una risposta da questo datore di lavoro

Il tuo curriculum e una lettera di presentazione personalizzati, che corrispondono esattamente a ciò che sta cercando.

Supera i filtri ATS

Vantaggi offerti da questo lavoro

Health, dental, vision
Wellness programs and RRSP
Equity or incentive compensation

Descrizione del lavoro

NXP Semiconductors in Ottawa, Canada is seeking an experienced IP architect to design and implement breakthrough Ethernet networking IP for next-generation automotive, industrial, and edge SoCs. You will own micro-architecture, Verilog RTL, and timing closure while collaborating with SoC teams to ensure timely, quality IP and robust documentation.

A strong foundation in RTL, IP development, and front-end tools is essential.

Competenze

  • Experience with RTL design of complex digital IP.
  • Proficiency in Verilog RTL design, logic synthesis, coverage analysis and timing closure.
  • Understanding IP development methodologies and front-end design tools.
  • Knowledge of TCP/IP protocols and networking concepts.
  • Experience with routers, bridges, and switches is desirable.
  • Security/cryptography experience is a plus.
  • Strong architectural, design, and problem-solving skills.
  • Team-player with good communication and documentation.

Mansioni

  • Architect, design and implement Ethernet/networking IP for next-gen SoCs.
  • Own micro-architecture, Verilog RTL, synthesis and timing closure.
  • Perform trade-offs on performance, area and complexity.
  • Ensure IP quality checks across Lint/CDC/Synthesis/STA/LEC.
  • Provide technical support including code reviews and project planning.
  • Collaborate with IP verification engineers to deliver on time and quality.
  • Document IP functionality and implementation specs.
  • Drive design methodology improvements.

Conoscenze

Verilog RTL design
Timing closure
IP development
Front-end design tools
TCP/IP protocols
Team collaboration
Communication
Security/cryptography

Formazione

Bachelor's degree in Computer Science, Engineering or related field

Strumenti

Synthesis tools
RTL analysis tools

Descrizione del lavoro

Business Line Description

Be an integral member of a highly-experienced team in R&D that is responsible for developing IP (Intellectual Property) used in the design of advanced microcontrollers and microprocessors. The IP for which this team is responsible enables a product portfolio with billion USD in annual revenue. Chances are that the car you drive, the intelligent devices that pervade your living space and the factories that produce the goods you use will contain one or more of the chips that you contribute to. The IP itself is challenging and of significant scope as it requires implementing very complicated and challenging algorithms in hardware/silicon. It incorporates latest Ethernet technology such as IEEE Time Sensitive Networking (TSN) that extends Ethernet for safety-critical and real-time applications. We are part of Advanced Chip Engineering, a central design organization within NXP, developing products for multiple business lines in Automotive, Internet of Things (IoT), Networking, and Radio Frequency products, with expertise in hardware engineering, including architecture, IP, and full SoC Design.

Job Summary

Architect, design and implement breakthrough Ethernet/networking IP to be integrated into next-generation SoCs for automotive, industrial and edge computing markets.

Responsible for micro-architecture, Verilog RTL implementation, logic synthesis and timing closure.

Perform trade-off analysis on performance/area/complexity.

Ensure front-end to back-end handoff IP quality checks such as Lint/CDC/Synthesis/STA/LEC and other.

Provide technical support to our engineering IP team, including code reviews, and assist in project planning and tracking.

Working closely with IP design verification engineers on planning and execution, to ensure the IP is delivered on time and with highest quality.

Quality documentation for all phases of the project; e.g. quality detailed IP functional and implementation specifications.

Proactively drive continuous improvement in design methodology.

Key Challenges

The IP itself is challenging and of significant scope as it requires implementing very complicated and challenging algorithms in hardware/silicon. It incorporates latest Ethernet technology such as IEEE Time Sensitive Networking (TSN) that extends Ethernet for safety-critical and real-time applications.

IP requires a well-thought-out scalable micro-architecture and proper parameterization that enables to grow the area/power linearly as the performance, capacity and functionality required, need to be increased.

IP developed in the team needs to be of high quality and implementation ready, requiring strong interactions with the SoC integration and implementation teams.

Interaction with architecture, software and marketing for IP definition and roadmap.

Work closely with SoC front-end integration and implementation, for IP execution.

Interaction with the application engineering to resolve customer issues.

Job Qualifications

Some experience in RTL design of complex digital IP is desireable but not required.

Knowledge in Verilog RTL design, logic synthesis, coverage analysis and timing closure.

Understanding of IP development methodology and proficiency in front-end design tools.

Knowledge of state-of-the-art networking technologies including TCP/IP protocols is desirable but not required.

Experience with data products such as routers, bridges and switches is desirable.

Security/cryptography experience would be an asset.

Strong architecture and design skills are desirable but not required.

Should be familiar with hardware and software implementation trade-offs.

Ability to solve system wide problems.

Algorithm development experience is desirable but not required.

Must work well in a team environment.

Strong interpersonal, communication, and documentation skills.

Bachelors in Computer Science, Engineering or related education required.

Job location: Ottawa, Canada

Salary & Benefits

The base salary range for this position is as mentioned below per year.

  • We offer health, dental, vision, wellness, saving programs and RRSP.
  • We also provide competitive benefits, incentive compensation, and/or equity for certain roles.

Please note that the base salary range (OR hourly rate) is a guideline, and individual total compensation may vary based on a number of factors such as qualifications, skill level, work location, and other business and organizational needs.

This base pay range is specific to Canada and is not applicable to other locations.

A reasonable estimate of the base salary range as of the date of this posting is from $72,000 to $99,000 CAD per year.

Company Overview

NXP Semiconductors N.V. (NASDAQ: NXPI) enables a smarter, safer, and more sustainable world through innovation. As the world leader in secure connectivity solutions for embedded applications, NXP is pushing boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets.

For more information, visit www.nxp.com

More information about NXP in Canada...

Bright Minds. Bright Futures. We believe that a key component to growing our business is to develop our people. To enable you to grow your career at NXP, we offer online and offline learning opportunities to help you develop some of your core and professional skills.

Commitment At NXP. We recognize NXP is a powerful change agent as we continue to deliver innovative solutions that advance a more sustainable future. We remain steadfast in our commitment to sustainability and making measurable year-on-year progress.

Also, we aim to create an inclusive work environment and we will not tolerate racism, discrimination or harassment of any kind.

We have programs in place focused on diversity, inclusion and equality.

Thank you for considering a career at NXP.

#LI-e41b

Ottieni la revisione del curriculum gratis e riservata.

o trascina qui il file.

Similar jobs

Offerte di lavoro simili che vale la pena confrontare

Logic Design Engineer
Logic Design Engineer

NXP Semiconductors NV • Ottawa

In loco
CAD 72.000 - 99.000
Health, dental, vision
RRSP
Equity (certain roles)
Principal IC Design Verification Engineer
Principal IC Design Verification Engineer

NXP Semiconductors • Ottawa

In loco
CAD 111.000 - 189.000
Health insurance
RRSP
Equity opportunities
R-10063879 Software Engineer – Hardware Design Verification
R-10063879 Software Engineer – Hardware Design Verification

NXP Semiconductors • Ottawa

In loco
CAD 137.800 - 189.000
R-10063157 Software Engineer – Hardware Design Verification
R-10063157 Software Engineer – Hardware Design Verification

NXP Semiconductors • Ottawa

In loco
CAD 90.000 - 120.000
Ethernet IP Design Engineer — TSN & SoC Architect
Ethernet IP Design Engineer — TSN & SoC Architect

NXP Semiconductors • Ottawa

In loco
CAD 72.000 - 99.000
Health, dental, vision
Wellness programs and RRSP
Equity or incentive compensation
Senior Product Marketer Healthcare
Senior Product Marketer Healthcare

NXP Semiconductors • Canada

Remoto
CAD 191.000 - 262.000
Senior ASIC (Front End) Design Engineer
Senior ASIC (Front End) Design Engineer

Ethernovia, Inc. • Toronto

Ibrido
CAD 140.000 - 190.000
Pre IPO stock options
Flexible hours
Medical, dental and vision insurance
Senior ASIC (Front End) Design Engineer
Senior ASIC (Front End) Design Engineer

Ethernovia • Toronto

Ibrido
CAD 120.000 - 180.000
Pre IPO stock options
Competitive base salary
Flexible hours
+1
IP Design PEY Intern
IP Design PEY Intern

Altera • Toronto

In loco
CAD 90.000 - 100.000
ASIC Digital Design, Architect
ASIC Digital Design, Architect

Synopsys Inc • Markham

Ibrido
CAD 140.000 - 210.000