GPU Design Verification Engineer

AMD; Markham; Vor Ort; CAD 120.000 - 180.000; Vollzeit

Zusammenfassung

AMD seeks a GPU Design Verification Engineer to join the verification team, working on full functional and performance closure for Graphics Core IP blocks. You will collaborate with architects, RTL designers, firmware, software, and validation teams to understand feature requirements and verification objectives.

You will architect and enhance reusable UVM environments, develop constrained-random and scenario-based test suites, and drive closure with coverage plans and signoff criteria.

Qualifikationen

• Proficient in IP level ASIC verification.
• Proficient in developing UVM testbenches and working in Linux and Windows environments.
• Experience with Verilog, System Verilog, C/C++.
• Development of UVM-based verification frameworks and testbenches, processes and flows.
• Experience with constrained random verification, functional coverage and assertions.
• Proficient in debugging RTL code using simulation tools.
• Scripting: Perl/Python/Ruby/Makefile/shell preferred.
• Experience developing AI-assisted automation tools, agents, or workflows using modern AI tools/frameworks.

Aufgaben

• Work closely with architects, RTL designers, firmware, software, and validation teams to understand feature requirements and verification objectives.
• Define verification strategies, methodologies, and coverage plans for complex architectural features.
• Develop comprehensive verification plans accounting for feature interactions, system-level use cases, software workflows, and firmware dependencies.
• Architect and enhance reusable UVM verification environments, scoreboards, checkers, generators, and coverage models.
• Develop constrained-random, directed, and scenario-based test suites.
• Drive verification closure and signoff criteria, including functional, code, assertion, and performance coverage.
• Debug test failures to determine root cause and resolve design defects with RTL/firmware teams.

Kenntnisse

IP level ASIC verification

UVM testbenches

Linux/Windows environments

Verilog

SystemVerilog

C/C++

Constrained random verification

Functional coverage

Assertions

Debug RTL code

Scripting languages

AI-assisted automation tools

Leadership / mentorship

Formal verification (asset)

Ausbildung

Bachelor's or Master's degree in Computer/Electrical Engineering

Tools

UVM

Jobbeschreibung

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believetechnology has the power to solve the world's most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMDis shapingthefuture.

Whetheryou'redesigning next-gen processors, enabling AI breakthroughs, orbringing leading edge products to market, every role at AMD contributes to something bigger— technologythat moves the world forward.Join us and, together, we'll advance your career.

THE ROLE:

As a GPU Design Verification Engineer on the verification team, you will work with leading industry tools and design & verification concepts to achieve full functional, performance closure on a variety of digital design blocks which are a part of the Graphics Core IP (GFXIP).

THE PERSON:

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES:

• Work closely with architects, RTL designers, firmware, software, and validation teams to understand feature requirements and verification objectives.
• Define verification strategies, methodologies, and coverage plans for complex architectural features.
• Develop comprehensive verification plans accounting for feature interactions, system-level use cases, software workflows, and firmware dependencies.
• Architect and enhance reusable UVM verification environments, scoreboards, checkers, generators, and coverage models.
• Develop constrained-random, directed, and scenario-based test suites.
• Drive verification closure and signoff criteria, including functional, code, assertion, and performance coverage.
• Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues

• Develop and deploy AI-driven and agentic verification workflows to improve verification productivity, automate testcase generation, coverage gap analysis, debug triage, regression management, and root-cause identification.

PREFERRED EXPERIENCE:

• Proficient in IP level ASIC verification
• Proficient in developing UVM testbenches and working in Linux and Windows environments

• Experienced with Verilog, System Verilog, C/C++
• Developing UVM based verification frameworks and testbenches, processes and flows
• Experience with constrained random verification, functional coverage and assertions
• Proficient in debugging RTL code using simulation tools

• Scripting language experience: Perl/Python/Ruby/Makefile/shell preferred.
• Experience developing AI-assisted automation tools, agents, or workflows using modern AI tools/frameworks.

• Exposure to leadership or mentorship is an asset
• Familiarity for Formal Verification is an asset

ACADEMIC CREDENTIALS:

• Bachelors or Masters degree in computer engineering/Electrical Engineering

This role is not eligible for Visa sponsorship.

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's “Responsible AI Policy” is available here.

This posting is for an existing vacancy.