FPGA Development Tools Engineer - Placer

Altera Corporation; Toronto; Hybrid; CAD 110,000 - 120,000; Full time

Job summary

Altera Corporation in Toronto, Canada is seeking an FPGA Development Tools Engineer to design and optimize placement algorithms within the compiler toolchain, influencing design timing and resource usage.

You will collaborate with routing, synthesis and timing teams to improve runtime performance and convergence for large customer designs, with a focus on timing-driven placement and scalable QoR improvements.

Qualifications

• Bachelor's Degree in CS, Computer Engineering, or related field.
• Working experience with C++.
• Experience with Verilog, Python and TCL is a plus.

Responsibilities

• Design, implement, and optimize FPGA placement algorithms.
• Enhance the end-to-end compiler flow within the toolchain.
• Improve runtime performance, QoR, and scalability for large designs.
• Develop timing-driven placement strategies for high-frequency designs.
• Analyze placement quality, congestion, and timing bottlenecks.
• Integrate placement capabilities into the compiler infrastructure.

Skills

C++

Verilog

Python

TCL

Education

Bachelor's Degree in CS, Computer Engineering, or related field

Job description

## FPGA Development Tools Engineer - PlacerApply: Toronto, Ontario, Canada: Full time: Posted Yesterday: R02885# **Job Details:**### ## **Job Description:**Altera is a leader in FPGA innovation, delivering programmable solutions that power AI, cloud computing, networking, and edge applications. Our compiler and tools teams are at the core of enabling customers to efficiently map complex designs to cutting-edge FPGA architectures.This role focuses on developing and optimizing FPGA placement algorithms within the compiler toolchain, directly impacting performance, power efficiency, and overall design quality.As part of the Quartus team, your responsibilities will include, but are not limited to:* **Placement Algorithm Development:** Design, implement, and enhance FPGA placement algorithms to optimize timing, congestion, and resource utilization.* **Compiler Flow Enhancement:** Contribute to the end-to-end FPGA compilation flow, working closely with routing, synthesis, and timing teams.* **Performance Optimization:** Improve runtime performance, scalability, and quality of results (QoR) for large and complex customer designs.* **Timing-Driven Placement:** Develop and refine timing-aware placement strategies to support high-frequency, performance-critical designs.* **Debug & Analysis:** Analyze placement quality, congestion hotspots, and timing bottlenecks; drive improvements to convergence and design closure.* **Toolchain Integration:** Integrate new placement capabilities into the compiler infrastructure and validate across diverse workloads.Our compensation is designed to reflect the Canadian labour market. The actual salary offered may vary based on several factors, including the position’s location, as well as the candidate’s experience, skills, training, and job-specific knowledge. In addition to base salary, we offer performance-based incentive opportunities that reward both individual contributions and overall company success.Estimated Salary Range: $110K– $120K CADWe use artificial intelligence to screen, assess, or select applicants for the position. This posting is for an existing vacancy. Canadian work experience is not required for this role. Applicants must be eligible for any required Canada export authorizations.### ## **Qualifications:*** Bachelor's Degree in CS, Computer Engineering, or related field* Working experience with C++* Experience with Verilog, Python and TCL is a plus### ## **Job Type:**Regular### ## **Shift:**Shift 1 (Canada)### ## **Primary Location:**Toronto, Ontario, Canada### ## **Additional Locations:**### ## **Posting Statement:**All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.