EDA CAD Automation Engineer: Analog & Mixed‑Signal

StarIC Inc; Toronto; On-site; CAD 90,000 - 120,000; Full time

Job summary

StarIC Inc., a Toronto-based semiconductor company, seeks an IT/CAD Automation Engineer to drive PDK and custom design automation flows for analog/mixed-signal IC design.

You will collaborate with layout, digital, and system teams, implementing schematic entry, parasitic extraction, and verification across process nodes from 7nm down to 3nm, interfacing with foundries such as TSMC and Samsung.

Qualifications

• Bachelor's degree in Electronic Engineering or a related field.
• 2–5 years of experience in a CAD Automation engineer role.
• Experience with technology nodes (7nm, 5nm, 4nm, 3nm, etc.).
• Familiarity with foundries (TSMC, Samsung, etc.) and design techniques.

Responsibilities

• Evaluate, set up, customize, and define PDK flows.
• Implement and drive Custom Design Automation flows, including schematic entry, layout design, and parasitic extraction for transistor-level flow.
• Model devices and simulate environments using Synopsys Custom Compiler PrimeSim XA.
• Apply knowledge in physical verification (DRC, LVS, DFM checks).
• Conduct electrical verification such as EMIR, ERC, and PERC.
• Characterize analog cells and verify reliability.
• Interface between digital and analog/mixed signal methodologies.
• Develop custom automation flows, customize rule decks, and enhance productivity and efficiency.
• Train, deploy, and support automation flows for design teams.
• Debug flow issues and test cases from design teams for simulation, LVS, DRC, EMIR, and post-layout simulation.
• Assist with tape-outs, final chip finishing runs, and interface with foundry/customers for rulesets.

Skills

CAD Automation

Synopsys tools

Cadence tools

Scripting TCL/Python

EDA methodologies

Verilog/VHDL basics

Education

Bachelor's degree in Electronic Engineering

Tools

Synopsys

Cadence

GDSII

Job description

StarIC Inc., a Toronto-based semiconductor company, seeks an IT/CAD Automation Engineer to drive PDK and custom design automation flows for analog/mixed-signal IC design.

You will collaborate with layout, digital, and system teams, implementing schematic entry, parasitic extraction, and verification across process nodes from 7nm down to 3nm, interfacing with foundries such as TSMC and Samsung.