Director of Silicon Engineering, AI-Native Chip Design

Octopyd

Toronto

Hybrid

CAD 270,000 - 300,000

Full time

7 days ago
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Job summary

Cognichip in Toronto, Canada, is seeking a Director of Silicon Engineering to scale our AI-native chip design organization. This leader will bridge deep technical expertise with strategic management to build a high-performing team capable of shipping production ASIC/SoC products.

Collaborating with Product, SW, and AI teams, you will pioneer AI-first hardware tools and define the technical roadmap to transform chip-design knowledge into actionable workflows.

Qualifications

  • 20+ years of experience across architecture, RTL design, verification, and physical design stages.
  • Proven experience building and leading engineering teams of 20+.
  • Track record of shipping multiple production ASIC/SoC products end-to-end.
  • Experience with, and exposure to, AI/ML-driven chip design workflows, tooling.
  • Experience with CAD systems; experience integrating workflows with EDA tools.

Responsibilities

  • Build, lead, and grow a high-performing hardware engineering team, including hiring, mentoring, and establishing management structure as the org scales
  • Set the technical roadmap for translating chip-design expertise into AI-consumable knowledge bases, agent playbooks, model training data, and tool-aware workflows
  • Own delivery of production-quality outcomes on schedule, partnering closely with Product, SW and AI/ML teams

Skills

Architecture and RTL design
Verification
Physical design
Leadership of 20+ engineers
AI/ML-driven chip design workflows

Tools

EDA tools
CAD systems

Job description

Director of Silicon Engineering, AI-Native Chip Design

Location: Toronto, ON, CA FULL_TIME

Salary: 270,000–300,000 CAD / year

Job Title

Director of Silicon Engineering, AI-Native Chip Design

About Cognichip

  • At Cognichip, we are building AI-native tools that transform how semiconductor engineers create, verify, and optimize chips.
  • Our platform combines large proprietary models, agentic workflows, domain-specific engineering intelligence, and high-performance simulation infrastructure to accelerate one of the world’s most complex engineering disciplines.

About the Role

  • We are seeking a Director of Silicon Engineering to scale our AI-native chip design organization.
  • This leader will bridge deep technical expertise with strategic management to build a high-performing team.
  • Collaborating with Product, SW, and AI teams, you will pioneer the next generation of AI-first hardware tools.
  • The ideal candidate has a proven track record of shipping production silicon and a passion for re-imagining chip design workflows through an AI lens.

Key Responsibilities

  • Build, lead, and grow a high-performing hardware engineering team, including hiring, mentoring, and establishing management structure as the org scales
  • Set the technical roadmap for translating chip-design expertise into AI-consumable knowledge bases, agent playbooks, model training data, and tool-aware workflows
  • Own delivery of production-quality outcomes on schedule, partnering closely with Product, SW and AI/ML teams

Required Qualifications

  • 20+ years of experience across architecture, RTL design, verification, and physical design stages
  • Proven experience building and leading engineering teams of 20+
  • Track record of shipping multiple production ASIC/SoC products end-to-end
  • Experience with, and exposure to, AI/ML-driven chip design workflows, tooling

Preferred Qualifications

  • Experience with CAD systems; experience integrating workflows with EDA tools
  • Experience developing, interacting with, or influencing, multi-disciplinary products involving HW, SW and AI

What It's Like Here

  • We’re a fast-moving AI startup with a collaborative, high-trust culture.
  • We value technical excellence, ownership, and the freedom to experiment.
  • Our best work happens when our builders and innovators work closely together to turn ambitious ideas into category defining products.
  • We operate on a hybrid schedule with four days in office, one day remote.
  • If you’re excited to build cutting edge tools that empower semiconductor engineers and reshape how chips are designed, you’ll feel right at home.
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