Digital ASIC Design Engineer

Blumind; Canada; Hybrid; CAD 140,000 - 190,000; Full time

Job summary

An innovative semiconductor start-up is seeking Senior and Principal Digital ASIC design engineers to join their dynamic team. This role offers the opportunity to work on cutting-edge technology that brings machine-learning inferencing to devices and sensors across various applications, including IoT and Smart Cities. The company values self-starters who are passionate about making a significant impact through intelligent devices. With a hybrid work model available in Toronto/Ottawa or remote across Canada, this position promises a collaborative environment where you can grow both individually and collectively. If you're ready to contribute to a company culture built on respect and integrity, this is the perfect opportunity for you.

Qualifications

• 7+ years of industry experience with at least 1 complete product design cycle.
• Expertise in Verilog, SystemVerilog, Perl, TCL, and Python.
• Concept --> Architecture --> RTL --> P&R --> Tapeout --> Silicon Debug / Test --> Product release.
• Prior technical leadership and startup work experience is a plus.

Responsibilities

• Lead digital ASIC design from concept to product release.
• Implement low power design techniques and verify mixed-signal blocks.

Skills

Verilog

SystemVerilog

Perl

TCL

Python

RTL design

Low power design techniques

AI compute architectures understanding

Customer support / silicon bring-up

Education

BSEE or MSEE focused on Digital IC design

Tools

RTL simulation tools

lint tools

debug tools

synthesis tools

DFT/ATPG tools

static timing closure tools

Job description

Blumind is an innovative and well-funded semiconductor start-up bringing machine-learning inferencing to the Far Edge, placing it on devices and sensors in all environments. Future applications in Edge AI such as IoT, automotive, Smart Home and Smart City will be crippled by the power and latency constraints of current digital technologies. Blumind’s breakthrough analog inferencing engine slashes power consumption, latency and silicon area all by orders of magnitude versus current approaches.

We're hiring highly motivated professionals who are driven to make a significant impact in the world by improving our lives through the proliferation of intelligent devices and sensors. We are looking for self-starters who are eager to contribute, grow individually and collectively, and build a company culture based upon respect, integrity, trust and passion.

We are hiring Senior and Principal Digital ASIC design engineers to join our team.

Requirements and Experience

• Education: BSEE or MSEE focused on Digital IC design
• Industry experience: 7+ years and have completed at least 1 complete product design cycle
• Concept --> Architecture --> RTL --> P&R --> Tapeout --> Silicon Debug / Test --> Product release
• Prior technical leadership and start-up work experience is a plus

Domain Knowledge

• Expert Verilog, SystemVerilog, Perl, TCL and Python skills
• RTL design and verification at chip level and block level
• Experience with industry standard RTL simulation, lint, debug, synthesis, DFT/ATPG and static timing closure tools
• Experience working on mixed-signal ASIC developments with knowledge of how to interface with and verify mixed-signal blocks
• Low power design techniques eg. clock and power gating
• Evaluation and integration of 3rd party IP such as microcontrollers, IOs etc.
• Understanding of compute and AI processing architectures is preferred
• Customer support and silicon bring-up experience

Location

Role is hybrid in Toronto/Ottawa or remote anywhere in Canada. Candidates willing to relocate to Canada will also be considered.

We thank all applicants for their interest in Blumind. Only candidates being considered will be contacted.

Seniority level

Mid-Senior level

Employment type

Full-time

Job function

Engineering and Information Technology

Industries

Semiconductor Manufacturing