ASIC Digital Design, Staff Engineer - 9291

Synopsys, Inc.; Markham; On-site; CAD 80,000 - 120,000; Full time

Job summary

Join a forward-thinking company as an ASIC Digital Design Verification Engineer, where your expertise in SystemVerilog and verification tools will drive innovation in high-performance silicon chip design. This role offers the opportunity to enhance the reliability of cutting-edge technologies and collaborate with multidisciplinary teams to ensure the highest quality standards in ASIC and FPGA verification. With a focus on continuous improvement, you will contribute to the future of connectivity and intelligence while thriving in a dynamic environment that values your professional growth. If you are passionate about technology and ready to make an impact, this is the perfect opportunity for you.

Benefits

Health benefits

Wellness programs

Financial benefits

Qualifications

• 5+ years of experience in digital design verification with hands-on expertise in SystemVerilog.
• Proficient with verification tools like Verdi and UVM.

Responsibilities

• Perform ASIC verification with emphasis on firmware verification.
• Develop and review detailed test plans and maintain testbenches.

Skills

SystemVerilog

Verdi

UVM

Perl

Python

Digital Design Verification

Mixed-Signal Design

DFT Design Methodologies

Asynchronous Clock Crossings

Education

Bachelor's degree

Master's degree

Tools

Jira

Confluence

Job description

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a seasoned ASIC Digital Design Verification Engineer with a passion for innovation and a track record of excellence. With a Bachelor's or Master's degree and at least 5 years of experience in digital design verification, you possess hands-on expertise in writing complex test cases in SystemVerilog and are proficient with verification tools like Verdi and UVM. Your familiarity with code quality metrics and previous experience in ASIC or FPGA verification flow set you apart. You bring valuable knowledge in high-speed digital and mixed-signal design, asynchronous clock crossings, and DFT design methodologies. Your proficiency with scripting languages such as Perl and Python, coupled with strong organizational and communication skills, make you an ideal fit for our dynamic team.

What You’ll Be Doing:

• Performing ASIC verification with emphasis on firmware verification.
• Reviewing digital and analog specifications to ensure comprehensive understanding.
• Developing, implementing, and reviewing detailed test plans.
• Creating modular constrained-random testbenches and maintaining existing testbenches.
• Launching periodic regressions and debugging failure cases efficiently.
• Performing functional coverage, code coverage, and assertion coverage to ensure thorough verification.
• Updating and maintaining documentation in Jira/Confluence.
• Creating analog models based on schematics and analog functions.
• Collaborating with digital, systems, and analog teams to ensure high verification quality.
  
  

The Impact You Will Have:

• Enhancing the reliability and performance of high-performance silicon chips and software content.
• Contributing to the development of innovative technologies that shape the future of connectivity and intelligence.
• Ensuring the highest quality standards in ASIC and FPGA verification processes.
• Driving continuous improvement in verification methodologies and practices.
• Supporting the seamless integration of digital and analog components in complex systems.
• Facilitating effective collaboration across multidisciplinary teams to achieve shared goals.
  
  

What You’ll Need:

• Bachelor’s or Master’s degree with at least 5 years of digital design verification experience.
• Proficiency with verification tools like Verdi and UVM.
• Hands-on experience in writing complex test cases in SystemVerilog.
• Familiarity with code quality metrics and prior experience in ASIC or FPGA verification flow.
• Knowledge of high-speed digital and mixed-signal design, asynchronous clock crossings, and DFT design methodologies.
• Proficiency with scripting languages such as Perl and Python.
  
  

Who You Are:

• A detail-oriented professional with strong analytical and problem-solving skills.
• An effective communicator with the ability to collaborate across teams and departments.
• Highly organized and capable of managing multiple tasks and projects simultaneously.
• Passionate about technology and innovation, with a commitment to continuous learning and improvement.
• Adaptable and flexible, able to thrive in a dynamic and fast-paced environment.
  
  

The Team You’ll Be A Part Of:

You will be part of a highly skilled and motivated team focused on ASIC Digital Design and Verification. Our team is dedicated to pushing the boundaries of technology and delivering cutting-edge solutions that drive the future of connectivity and intelligence. We value collaboration, innovation, and excellence, and we are committed to supporting each team member's professional growth and development.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.