Application Specific Integrated Circuit Design Engineer

HCLTech; Toronto; On-site; CAD 100,000 - 130,000; Full time

Job summary

A leading company in semiconductor manufacturing seeks an Application Specific Integrated Circuit Design Engineer in Toronto. This mid-senior level role involves developing and implementing display technologies, mentoring junior engineers, and requires extensive experience in ASIC design. Join a dynamic team to drive innovation and success in cutting-edge technology.

Qualifications

• Minimum 7 years of ASIC design experience.
• In-depth knowledge of the design process from specification to verification.
• Experience with multi-clock domain designs and IP development.

Responsibilities

• Develop well-designed and qualified display features.
• Lead micro-architecture and design efforts.
• Mentor junior engineers and drive issue resolution during development.

Skills

Verilog

SystemVerilog

Analytical Thinking

Problem-Solving Skills

Teamwork

Communication Skills

Tools

Confluence

GIT

JIRA

Perl

Python

Job description

Application Specific Integrated Circuit Design Engineer

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• The candidate would work closely with a team of designers, architects, and verification engineers to design and implement various display technologies.

KEY RESPONSIBILITIES :

• Develop well designed and qualified display features
• Lead micro-architecture and design efforts based on high level architectural requirements
• Able to build complex systems to meet various design requirements including (but not limited to) functionality, performance, power, area, scalability and testability.
• Timely develop functional and implementation specifications, as well as test plans
• Develop and execute implementation and validation plans of the feature. Proactively driving and resolving any issues that may arise during the development stage
• Resolve pre-layout and post-layout timing and functional eco issues
• Mentor junior engineers to complete their tasks.

PREFERRED EXPERIENCE :

• Minimum 7 years of ASIC design work experience
• Have in depth knowledge of entire design process from design specification, defining architecture, micro-architecture, RTL design and functional verification, synthesis, timing and formal verification
• Proficiency of Verilog or SystemVerilog
• Experience with multi-clock domain designs
• Experience in IP development
• Knowledge in video / display standards a plus.
• Strong in both written and verbal communication
• Strong analytical thinking and problem-solving skills
• Good teamwork and interpersonal skills

ARM GLS Skill set.

• Good DV Skill with major GLS work experience.
• Expertise in testbench updates for GLS
• Expertise in Scripting languages perl or python
• Experience with Make, Yaml & Json file systems.
• Experience with 0 delay simulations and post layout simulations with SDF back annotations (Best / Typical / Worst Case analysis).
• Good understanding of RTL synthesis , Static Timing Analysis & LEC Flows.
• Experience with flow optimizations such as Grey / Black-boxing techniques
• Good at communicating requirements / issues with Implementation, PnR and Design teams.
• Working knowledge of Confluence documentation , version system GIT and Project execution with JIRA.

Seniority level

Seniority level

Mid-Senior level

Employment type

Employment type

Full-time

Job function

Job function

Information Technology

Semiconductor Manufacturing, Manufacturing, and IT Services and IT Consulting

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Application Engineer • Toronto, ON, Canada