Software Engineer II: PCle VIP R&D

Cadence Design Systems; Belo Horizonte; Presencial; BRL 60.000 - 100.000; Tempo integral

Resumo da oferta

Join an innovative and dynamic team as a Software Engineer II, where you will be instrumental in developing cutting-edge PCIe Verification IP solutions. This role offers the opportunity to work in a fast-paced environment, collaborating with diverse teams globally. Your expertise in C/C++ and problem-solving skills will be essential in delivering robust software solutions that meet customer needs. This is a fantastic chance to make a significant impact in a company recognized for its outstanding workplace culture and commitment to technological advancement.

Serviços

Competitive benefits

Flexible working hours

Professional development opportunities

Qualificações

• Experience in modeling in C/C++ with a focus on algorithms and data structures.
• Strong debugging techniques for troubleshooting software issues.

Responsabilidades

• Develop and validate PCIe Verification IP software solutions.
• Collaborate with multi-site teams to meet product requirements.

Conhecimentos

C/C++

Object-oriented programming

Algorithms

Data structures

Analytical skills

Problem-solving skills

Communication skills

Formação académica

Bachelor's degree in Computer Science

Ferramentas

Verilog/System Verilog

EDA tools

Descrição da oferta de emprego

Software Engineer II: PCle VIP R&D page is loaded

Software Engineer II: PCle VIP R&D

Apply locations BELO HORIZONTE time type Full time posted on Posted 28 Days Ago job requisition id R49444

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence Design Systems Inc. is looking for a motivated Software Engineer II: PCle VIP R&D to work with us in Belo Horizonte, Brazil.

At Cadence, we hire and develop leaders and innovators who want to impact the world of technology. Cadence has been nominated as a Great Place to Work globally and in Brazil and is also a Fortune 100 Best Companies to Work For .

As a Software Engineer II, you will be part of VIPPCIE R&D team in the SVG group in Belo Horizonte, Brazil.

The VIPPCIE R&D team works with PCIe verification IP. To understand more on what we do, you can visit PCIe VIP at Cadence .

Working at Cadence is very dynamic, fast-paced, and integrated with other teams all around the world.

Job Description:

• Candidate will be responsible for software development and validation of PCIe Verification IP.
• Candidate is expected to participate in development efforts of the PCIe product to meet customer use model, solution requirements, protocol specification and execute necessary SW development practices to create reusable robust software solution to enable verification of these interface protocols.
• Candidate should be able to work with multi-site and diverse team. You need to effectively collaborate multi location development team to contribute in PCIe verification IP development, milestones technical roadmap and people training for success.
• The candidate is also expected work with technical support lead and key customers to resolve implementation or usage issues as Cadence VIP products are used within various verification environments and timing critical to our customer’s successes.

Requirements:

• Complete Bachelor's degree in Computer Science and experience or a related technical field with relevant experience.
• Extensive experience in modeling in C/C++ and background in object-oriented, algorithms, and data structures.
• In-depth understanding of complexity, analysis graph algorithms, and advanced debugging techniques for proficiency in troubleshooting software issues and debugging a large codebase.
• Strong analytical and problem-solving skills with an ability to visualize processes and outcomes.
• Outstanding all-round communication skills and ability to work collaboratively in a dynamic multi-location environment.

Nice to have:

• Working knowledge of PCI Express (PCIe) protocol or one or more protocols USB, NVME, SATA, Display Port, etc.
• Knowledge of Verilog/System Verilog languages and OVM/UVM verification methodologies.
• Experience with digital logic design or IP/SoC level Verification flow.
• Customer orientation and knowledge of the EDA tool flow.

Additional Job Details:

• Employment category: CLT
• Employment term: 40 hours/week.
• Competitive benefits.
• Location: Av Contorno 5800, Belo Horizonte, Minas Gerais Brazil.

About Cadence Design Systems:

Cadence is the only company that provides the expertise and tools, IP, and hardware required for the entire electronics design chain, from chip design to chip packaging to boards and to systems. We enable electronic systems and semiconductor companies to create innovative products that transform the way people live, work, and play. Our products are used in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. For more information, access http://www.cadence.com.

We’re doing work that matters. Help us solve what others can’t.

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Lead Software Engineer: PCle VIP R&D

locations BELO HORIZONTE time type Full time posted on Posted 28 Days Ago

Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences.

Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.

Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.