Single-Event Transient Current Pulse Modeling by TCAD in sub-100 nm CMOS technologies

Imec India Private Limited; Vlaams-Brabant; Sur place; EUR 40 000 - 60 000; Plein temps

Résumé du poste

A leading technology research company in Belgium is looking for a Master’s student for a 6-month internship/project focused on modeling single-event transient pulses in sub-100 nm CMOS technologies. Responsibilities include analyzing charge recombination effects and developing a SET current pulse model. Candidates should have a background in Electrotechnics or Electrical Engineering and experience with TCAD simulations is a plus.

Qualifications

• Must have background in Electrotechnics or Electrical Engineering.
• Experience with TCAD simulations is preferred.

Responsabilités

• Analyze charge recombination effects in simulations.
• Simulate SET behavior in bulk CMOS transistors.
• Develop a SET current pulse model for sub-100 nm CMOS technology.

Connaissances

Charge Recombination Analysis

SET Simulation in CMOS

SPICE Simulation

Formation

Master of Engineering Technology

Description du poste

/ Single-Event Transient Current Pulse Modeling by TCAD in sub-100 nm CMOS technologies

Single-Event Transient Current Pulse Modeling by TCAD in sub-100 nm CMOS technologies

Master projects/internships - Leuven | More than two weeks ago

Investigation of radiaion effects in CMOS technologies

Single-event effects (SEEs) present significantchallenges for integrated circuits (ICs) operating in space environments. Whenenergetic particles strike sensitive regions of these devices, ionizationgenerates free charges, resulting in transient voltage perturbations known assingle-event transients (SETs). In analog circuits or combinatorial logic,these SETs can lead to various kinds of SEEs, such as single-event upsets(SEUs) and single-event functional interrupts (SEFIs).

To model SETs in circuits, a double-exponentialcurrent model is often used. However, this approach has limitations whencompared to experimental data, particularly in accounting for chargerecombination effects, which are critical to accurately representing SETphenomena. This project aims to develop a mathematical SET current pulse model, which canbe used in the standard IC design flows. Such a model will enhanceunderstanding of the underlying mechanisms and facilitate the extraction of keyparameters for improved SET modeling.

Main Tasks

• AnalyzeCharge Recombination Effects: Investigate the charge recombination processesbased on simulation results and develop a mathematical model to describe theseeffects.
• SimulatingSETs in Bulk CMOS Transistors: Perform in-depth modeling to study SET behaviorand analyze its impact on device performance.
• Develop a SETcurrent pulse model for sub-100 nm CMOS Technology using literature referencesand validate the model against experiments and/or TCAD simulations.
• Cross-Verifyingwith SPICE Simulations: Update the SPICE SET model using insights from the physical-level(TCAD-like) simulations and validate the results against experimental data toensure the theory's accuracy and applicability.
• (Optional)Extension of SOI technology: Further extending the bulk model to FD-SOItechnology and comparing the difference in SET process and mechanism .

Type of project: Thesis, Combination of internship and thesis

Duration: 6 months

Required degree: Master of Engineering Technology

Required background: Electrotechnics/Electrical Engineering

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