Senior Mixed-Signal Image Sensor Design Engineer

eyeo; Antwerpen; Sur place; EUR 85 000 - 140 000; Plein temps

Résumé du poste

eyeo is seeking an Image Sensor Mixed-Signal Design Engineer in Antwerp, Belgium, to lead top-level mixed-signal verification and develop robust verification methodologies across analog and digital design teams.

You will collaborate with analog IC designers, digital implementation, verification, and silicon bring-up teams to ensure a scalable mixed-signal flow, drive regression strategies, and debug complex integration issues from architecture to silicon bring-up.

Qualifications

• 8+ years of hands-on experience in CMOS image sensors or mixed-signal SoCs.
• Strong experience in mixed-signal IC design and verification.
• Solid understanding of analog and digital integration challenges.

Responsabilités

• Define, develop, and execute top-level mixed-signal (analog/digital) verification environments for complex mixed-signal SoCs and IPs.
• Develop and maintain verification strategies covering analog, digital, and mixed-signal interactions.
• Ensure functional correctness and performance validation of mixed-signal systems across behavioral and transistor-level simulations.
• Drive regression methodologies and verification coverage for mixed-signal designs.
• Debug complex mixed-signal simulation and integration issues.

Connaissances

CMOS image sensor design

Mixed-signal verification

Verilog-A/Verilog

Cross-functional collaboration

Formation

Master’s or PhD in Electrical Engineering, Microelectronics, or Physics

Outils

Cliosoft SOS

Git

SVN

Description du poste

eyeo is seeking an Image Sensor Mixed-Signal Design Engineer in Antwerp, Belgium, to lead top-level mixed-signal verification and develop robust verification methodologies across analog and digital design teams.

You will collaborate with analog IC designers, digital implementation, verification, and silicon bring-up teams to ensure a scalable mixed-signal flow, drive regression strategies, and debug complex integration issues from architecture to silicon bring-up.