Lead AI HPC Performance Architect

imec; Vlaams-Brabant; Sur place; EUR 110 000 - 160 000; Plein temps

Résumé du poste

imec's Compute System Architecture Unit in Leuven, Belgium, seeks a Principal AI Performance Architect to drive cross-layer codesign for next-gen HPC systems. You will model performance, build projections, and steer innovations across applications and semiconductor technology.

You will work with experts to capture AI workloads, identify bottlenecks, and propose architectures. Your leadership will guide system and SoC requirements, evaluation infrastructure, and energy/performance tradeoffs.

Qualifications

• Master’s or PhD in Computer Science or Computer Engineering with ~8 years of experience.
• Experience in performance analysis, HPC optimization and AI for HPC.
• Experience with distributed AI/ML applications and large-scale systems.
• Strong programming in C++ and Python; CUDA knowledge is a plus.
• Excellent communication in English and mentoring capabilities.

Responsabilités

• Architect software-hardware codesign solutions across layers from applications to semiconductor tech.
• Develop system modeling, performance projections and evaluations for HPC architectures.
• Collaborate with multi-disciplinary teams to capture AI workloads for HPC and guide design space.
• Define system/SoC requirements and evaluate energy, cost and performance tradeoffs.
• Mentor junior engineers and share knowledge to advance project milestones.

Connaissances

Performance analysis

HPC optimization

Distributed AI/ML

System performance modeling

GPU architectures

C++

Python

Communication

Mentoring

English

Formation

Master’s or PhD in CS/CE

Outils

CUDA

Description du poste

imec's Compute System Architecture Unit in Leuven, Belgium, seeks a Principal AI Performance Architect to drive cross-layer codesign for next-gen HPC systems. You will model performance, build projections, and steer innovations across applications and semiconductor technology.

You will work with experts to capture AI workloads, identify bottlenecks, and propose architectures. Your leadership will guide system and SoC requirements, evaluation infrastructure, and energy/performance tradeoffs.