Investigating Interface Disorder in Cryogenic CMOS Through Noise Spectroscopy

Imec India Private Limited; Vlaams-Brabant; Sur place; EUR 40 000 - 60 000; Plein temps

Résumé du poste

A leading research technology organization in Belgium is offering a master's internship project focused on investigating interface disorder in cryogenic CMOS technology. The role involves collaboration with a recognized research team, advanced device characterization, and the opportunity to work in cutting-edge laboratories. Ideal candidates should have a master's background in relevant engineering or science fields.

Qualifications

• Educational background in Nanoscience & Nanotechnology, Electrotechnics/Electrical Engineering, or Physics.

Responsabilités

• Collaborate with an internationally recognized research team.
• Utilize state-of-the-art experimental facilities for cryogenic CMOS testing.
• Analyze and present research findings in a clear and professional way.

Formation

Master of Engineering Technology

Master of Science

Master of Engineering Science

Description du poste

Overview

Investigating Interface Disorder in Cryogenic CMOS Through Noise Spectroscopy

Master projects/internships - Leuven | More than two weeks ago

Understanding the noise of cryo-CMOS devices through the impact of interace disorder

Cryogenic CMOS technology offers a promising solution by allowing control electronics to be integrated inside the cryostat, near the qubits, at temperatures around 4 K. Nevertheless, the performance of CMOS devices at cryogenic temperatures is limited by interface disorder, which generates excess noise and reduces the quantum processor's efficiency.

This project will focus on using noise analysis to investigate the impact of interface disorder on scaled CMOS technology nodes. You will gain hands-on experience with cutting-edge technology and have access to world-class laboratories, contributing directly to a better understanding future quantum computing control hardware.

Project Tasks and Objectives

• Collaborate with an internationally recognized research team
• Utilize state-of-the-art experimental facilities for cryogenic CMOS testing
• Apply advanced device characterization techniques to the latest technology nodes
• Analyze and present research findings in a clear and professional way to a knowledgeable audience

Type of project

Combination of internship and thesis

Duration

1 academic year

Required degree

Master of Engineering Technology, Master of Science, Master of Engineering Science

Required background

Nanoscience & Nanotechnology, Electrotechnics/Electrical Engineering, Physics

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