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Euraxess in Heverlee, Belgium, is looking for a Digital Front-End Design Engineer to drive the complete RTL-to-GDS flow and shape next-generation silicon solutions. You will ensure high-quality implementation of complex ASIC designs while collaborating with a skilled team.
The ideal candidate should possess 0-2 years of front-end design experience, knowledge of synthesis and DFT, and proficiency in Cadence and Synopsys toolsets. If selected, you'll join a premier research center committed to inclusivity and innovation while receiving a competitive salary.
Euraxess in Heverlee, Belgium, is looking for a Digital Front-End Design Engineer to drive the complete RTL-to-GDS flow and shape next-generation silicon solutions. You will ensure high-quality implementation of complex ASIC designs while collaborating with a skilled team.
The ideal candidate should possess 0-2 years of front-end design experience, knowledge of synthesis and DFT, and proficiency in Cadence and Synopsys toolsets. If selected, you'll join a premier research center committed to inclusivity and innovation while receiving a competitive salary.