Mixed-Signal ASIC Lead

The Onset Group; Sydney; On-site; AUD 140,000 - 180,000; Full time

Benefits offered by this job

Equity

Superannuation

Full Australian working rights

Job summary

The Onset Group is seeking an experienced Mixed-Signal ASIC Lead to own the external design partnership and drive the first product ASIC from specification to silicon. You will join an early-stage deep tech team developing diamond-based quantum sensing into compact devices and will influence how the market is approached with a practical, tested CMOS solution.

You will lead cross-disciplinary hardware and firmware efforts, bring up first silicon, and work closely with industry partners to align

Qualifications

• Around five to ten years in mixed-signal ASIC design, including photosensor design or validation.
• Experience taking a chip from specification to measured silicon, with a clear account of your contribution.
• Confidence investigating differences between simulation and bench results.
• The judgement to challenge a design partner and explain trade-offs to colleagues across disciplines.
• A willingness to get into the lab and work through the problem yourself.

Responsibilities

• Define CMOS requirements and manage outsourced design and characterisation through to tape-out.
• Review simulations against specifications and bring up first silicon, including packaged parts and bare die.
• Characterise noise, linearity, bandwidth, power and photosensor performance across temperature and supply conditions.
• Correlate measurements with simulation, automate repeatable tests and feed findings into the next design.
• Develop test interfaces, including package/PCB layout, needle probing and probe cards.
• Support ASIC integration, FPGA controller programming and migration of FPGA functions into future CMOS/SoC designs.

Skills

Mixed-signal ASIC design

Photosensor design/validation

Chip specification to silicon

Bench vs simulation analysis

Job description

Mixed-Signal ASIC Lead

(Full Australian working rights required)

$140-180k + super + equity

Take diamond-based quantum sensing into its first product ASIC:

An early-stage deep tech company is turning diamond-based quantum sensing into compact devices for real-world deployment

• The research chip exists, and its limitations have been investigated
• Customer demand is bringing the next chip's development forward alongside field trials
• You'll join as the first dedicated chip specialist, owning the external design partnership and helping deliver the first product ASIC

The opportunity goes beyond a smaller sensor:

• Integrating diamond-based sensing with custom silicon creates more ways to embed magnetic measurement into equipment
• Smaller devices can be deployed in arrays and networks, measuring changes across a wider area
• Applications include navigation where GPS is unavailable and detecting magnetic anomalies across distributed sensors
• Your engineering decisions will help determine how that capability becomes a practical commercial product

You'll own a close technical partnership:

• Become the primary technical contact for an external chip design team that works as an extension of the business
• Build on an established, positive relationship, setting requirements and challenging assumptions with evidence
• Report to the Product and Engineering Lead and work closely with hardware and firmware engineers
• Connect design decisions to product requirements and partner needs

Your remit runs from specification to measured silicon:

• Define CMOS requirements and manage outsourced design and characterisation through to tape-out
• Review simulations against specifications and bring up first silicon, including packaged parts and bare die
• Characterise noise, linearity, bandwidth, power and photosensor performance across temperature and supply conditions
• Correlate measurements with simulation, automate repeatable tests and feed findings into the next design
• Develop test interfaces, including package/PCB layout, needle probing and probe cards
• Support ASIC integration, FPGA controller programming and migration of FPGA functions into future CMOS/SoC designs

Success means taking ownership, then shaping what comes next:

• First six months: Understand the current chip in depth and take responsibility for the design-partner relationship
• As the programme approaches tape-out: Use your understanding of target markets and partner needs to guide future chip and peripheral improvements
• Throughout: Give the wider team clear technical recommendations grounded in measured performance

You'll bring experience you can explain at the bench:

• Around five to ten years in mixed-signal ASIC design, including photosensor design or validation
• Experience taking a chip from specification to measured silicon, with a clear account of your contribution.
• Confidence investigating differences between simulation and bench results.
• The judgement to challenge a design partner and explain trade-offs to colleagues across disciplines.
• A willingness to get into the lab and work through the problem yourself.

The team and the practicalities:

• A small, collaborative engineering team where your specialist judgement will be visible and relied upon
• Hands-on lab work, with flexibility
• Full Australian working rights required