FPGA Engineer

GQR

Sydney

On-site

AUD 100,000 - 140,000

Full time

14 days+

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Job summary

A leading trading firm in Sydney is seeking a Head of Electronic Trading Technology with expertise in FPGA engineering to develop cutting-edge systems. You will work on ultra-low latency solutions and collaborate with cross-functional teams to boost trading performance. The ideal candidate will have a minimum of 2 years of FPGA design experience and a Bachelor's Degree in a related field. Financial experience is not required.

Qualifications

  • Minimum 2 years experience in FPGA design lifecycle.
  • Strong knowledge of RTL coding and system integration.
  • Adaptable and team-oriented with problem-solving skills.

Responsibilities

  • Develop high performance FPGA systems in RTL designs.
  • Design ultra low latency, high throughput trading systems.
  • Evaluate latency and throughput while providing feedback.

Skills

FPGA design lifecycle
Verilog
System Verilog
VHDL
Linux environment
Problem solving

Education

Bachelor's Degree in Computer Engineering

Tools

XILINX FPGA design flow
ALTERA FPGA design flow

Job description

Head of Electronic Trading Technology Recruitment APAC at GQR Global Markets

A Global leading High Frequency Trading Firm are recruiting for expert FPGA Engineers to provide cutting edge automated ultra-low latency solutions. This team is at the forefront of the industry, responsible for designing, developing and supporting high frequency trading systems.

Well suited for anyone coming from an Embedded system, Hardware Engineering, FPGA Engineering, Performance Engineering background.

Responsibilities
  • Develop high performance FPGA systems in RTL designs.
  • Work as part of a team on the development and implementation of proprietary hardware trading systems from concept to production.
  • Design ultra low latency, high throughput, and FPGA-based custom financial trading systems to accelerate algorithmic trade signal generation and order execution.
  • Accelerate network infrastructure and trading system components with high-speed FPGA designs.
  • Create digital design and verification to maximize the efficiency and performance, and to process vast amounts of data across trading systems.
  • Evaluate latency and throughput while providing immediate feedback of operating designs. Work closely with cross-functional teams, including Front Office, Quantitative Research, Engineering and Traders.
Qualifications
  • Minimum 2 years experience in the full FPGA design lifecycle; including hardware architecture, RTL coding, simulation, system integration, hardware validation, verification module design, and testing.
  • Experience working in Verilog, System Verilog, or VHDL.
  • Strong working knowledge of either XILINX or ALTERA FPGA design flow.
  • Ability to work in a Linux environment.
  • Exposure to network and system level protocols, packet based data processing, and computer architecture.
  • Excellent problem solving skills, with strengths in conducting research and gathering data.
  • Must be adaptable and team oriented.
  • Minimum Bachelors Degree in Computer Engineering, Computer Science, or related.

Financial experience is not required.

While a resume is preferable we also welcome tentative inquiries from well-qualified persons. Utmost confidentiality and discretion are assured. If interested, please email jared.stone@gqr.com

Seniority level
  • Mid-Senior level
Employment type
  • Full-time
Job function
  • Industries: IT Services and IT Consulting, Banking, and Financial Services

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Sydney, New South Wales, Australia

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