RF/Analog IC Layout Engineer - Shape Cellular RF Tech

Apple Inc.

Linz

On-site

EUR 77,000 - 136,000

Full time

13 days ago
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Benefits offered by this job

Comprehensive insurance
Retirement benefits
Product discounts
Education reimbursement
Relocation assistance

Job summary

Apple Inc. is seeking an experienced RF/Analog Layout Engineer to contribute to groundbreaking RF transceiver designs in advanced CMOS technologies.

You will floor-plan with RF IC design and the RF system team, producing block- and transistor-level layouts with verification from start to finish. You will review routing, signal path integrity, IQ matching and coupling, collaborate with packaging teams to understand de-sense and parasitics, and participate in cross-functional design reviews.

Qualifications

  • Bachelor's or Master's in Electrical Engineering or equivalent.
  • Minimum 3 years of relevant industry experience.
  • Proficiency with CALIBRE DRC, LVS, ANTENNA-DRC.
  • Knowledge of Cadence layout tools.
  • English fluency required.

Responsibilities

  • Floor-planning in collaboration with RF IC design and the RF system team.
  • Layout of RF, analog, and digital blocks for RF ICs down to the transistor level.
  • Block-level and top-level layout through full verification flow.
  • Top-level layout integration, verification, and schedule management.
  • Work with packaging experts to simulate RF de-sense and coupling mechanisms.
  • Layout reviews for routing, signal path, IQ matching, and coupling.

Skills

RF layout
Analog layout
English fluency

Education

Bachelor's or Master's in Electrical Engineering

Tools

Cadence tools
CALIBRE DRC/LVS

Job description

Apple Inc. is seeking an experienced RF/Analog Layout Engineer to contribute to groundbreaking RF transceiver designs in advanced CMOS technologies.

You will floor-plan with RF IC design and the RF system team, producing block- and transistor-level layouts with verification from start to finish. You will review routing, signal path integrity, IQ matching and coupling, collaborate with packaging teams to understand de-sense and parasitics, and participate in cross-functional design reviews.

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