Network CCL Engineer for AI Accelerators

Gateworth Group; Dubai; On-site; AED 320,000 - 480,000; Full time

Job summary

Gateworth Group is seeking a Network CCL Engineer to push the performance envelope of collective communication for accelerator hardware and large‑scale AI workloads in Dubai.

You will develop primitives, optimize data paths across PCIe, RDMA fabrics and device‑to‑device links, and collaborate with hardware, runtime and distributed systems teams to scale inference across multi‑chip and multi‑rack environments.

Qualifications

• 5+ years in distributed systems, runtime engineering, networking or accelerator‑level development.
• Strong C/C++ and Python programming experience.
• Solid understanding of collective communication operations (AllReduce, ReduceScatter, AllGather, AllToAll, Broadcast, Send/Recv, Barrier).
• Familiarity with NCCL, RCCL, oneCCL, MPI, UCX or libfabric.
• Understanding of GPU/NPU memory behaviour and heterogeneous device communication.
• Experience with queues, streams, events, synchronization and memory management.

Responsibilities

• Develop collective communication primitives for accelerator‑based systems.
• Build communication support for multi‑device and rack‑level inference environments.
• Design heterogeneous communication paths across accelerator and GPU devices.
• Create runtime components for device discovery, rank management, topology awareness, queues, streams, events and synchronization.
• Integrate transport mechanisms across PCIe, RDMA‑based networking, custom fabrics and device‑to‑device communication.
• Collaborate with hardware, runtime, compiler and distributed systems teams on scalable communication solutions.
• Diagnose and optimise communication bottlenecks including bandwidth, latency, congestion and synchronization overhead.

Skills

Distributed systems

C/C++

Python

Performance optimization

Latency optimization

Tools

NCCL

RCCL

oneCCL

MPI

UCX

libfabric

Job description

Gateworth Group is seeking a Network CCL Engineer to push the performance envelope of collective communication for accelerator hardware and large‑scale AI workloads in Dubai.

You will develop primitives, optimize data paths across PCIe, RDMA fabrics and device‑to‑device links, and collaborate with hardware, runtime and distributed systems teams to scale inference across multi‑chip and multi‑rack environments.