Wafer Fabrication Manufacturing Engineer, Day Shift, Raxium

Google; Fremont (CA); On-site; USD 113,000 - 161,000; Full time

Job summary

An established industry player is seeking a seasoned professional to join their Hardware Testing Engineering team. This role involves designing test equipment for cutting-edge prototypes and ensuring the reliability of advanced semiconductor technologies. You will collaborate with design engineers to refine hardware, contributing to innovative display technologies that bridge digital and physical realms. With a commitment to quality and efficiency, your expertise will be pivotal in optimizing fabrication processes and enhancing product standards. Join a dynamic team at the forefront of technology and help shape the future of display products through your engineering prowess.

Benefits

Bonus

Equity

Comprehensive health benefits

Flexible work hours

Employee discounts

Qualifications

• 10 years in semiconductor wafer fab cleanroom environment.
• PMP or Six Sigma certification preferred.

Responsibilities

• Monitor and sustain fabrication processes in lithography and etch.
• Drive problem resolution associated with quality excursions.

Skills

Lean Manufacturing

Microelectronics fabrication

Semiconductor Engineering

Testing and troubleshooting

Failure analysis

Process optimization

Education

Bachelor's degree in Engineering

Tools

Statistical Process Control (SPC)

Job description

Minimum qualifications:

1. Bachelor's degree in Engineering disciplines (e.g., Electrical, Applied Physics, Optics, Material Sciences, Mechanical) or equivalent practical experience.
2. 10 years of experience in a production semiconductor wafer fab cleanroom environment.
3. Experience applying Lean Manufacturing principles in production environments.
4. Microelectronics fabrication experience.
5. Experience with high-volume manufacturing.
6. Experience with Semiconductor Engineering.

Preferred qualifications:

1. PMP or Six Sigma certification.
2. 3 years of experience testing, troubleshooting, and with failure analysis.
3. Experience with leading design for manufacturability, hardware manufacturing, and lean manufacturing.
4. Experience working on process/operational optimization.

Google's custom-designed machines make up one of the largest and most powerful computing infrastructures in the world. The Hardware Testing Engineering team ensures that this cutting-edge equipment is reliable. In the R&D lab, you design test equipment for prototypes of our machinery and develop the protocols used to scale these tests for the entire global team. Working closely with design engineers, you give input on designs to improve our hardware until you're sure it meets Google's standards of quality and reliability.

Google's Raxium display group has established a revolutionary semiconductor materials display technology that enables new functionality in display products, bringing to users a closer and more natural linkage between the digital and physical realms in applications such as augmented reality (AR) and light-field display. With start-up roots and a state-of-the-art compound semiconductor fab in Silicon Valley, Raxium is seeking to build upon its engineering team with an aim to disrupt next-generation display markets.

The US base salary range for this full-time position is $113,000-$161,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google (https://careers.google.com/benefits/).

Responsibilities:

1. Monitor and sustain, and support fabrication processes encompassing areas of lithography, thin film, etch, clean, thermal, metrology/characterization and backside wafer thinning.
2. Ensure process robustness, efficiency and consistency by providing technical support to technicians.
3. Work with process engineers, metrology engineers and integration engineers to review, propose, optimize, improve and implement various wafer fabrication processes and new equipment introduction for safety enhancement, yield improvement, defectivity reduction, and manufacturability.
4. Enhance area process control plan and the process capability through implementation of best known manufacturing methods, lean manufacturing principle and the statistical process control (SPC).
5. Drive problem resolution process associated with the quality excursion in the Fabrication (fab) area encompassing data analytics, methodical problem solving, failure analysis (FA), design of experiments (DOE), and mistake-proof.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also https://careers.google.com/eeo/ and https://careers.google.com/jobs/dist/legal/OFCCP_EEO_Post.pdf If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form: https://goo.gl/forms/aBt6Pu71i1kzpLHe2.