Wafer AI - Member of Technical Staff

deCircle; San Francisco (CA); On-site; USD 200,000 - 300,000; Full time

Benefits offered by this job

Equity (0.5%-1%)

Job summary

Wafer AI in San Francisco seeks a software engineer focused on hardware-near systems to optimize AI inference on heterogeneous hardware. You will ship day-zero support for open-source models and tune kernels across CUDA/HIP/Triton to meet latency and throughput targets.

Ideal candidates have 1–6 years of SWE experience near hardware, with GPU kernel expertise and strong problem-solving. On-site 5 days in FiDi SF is required for candidates already in the US.

Qualifications

• 1–6 years SWE focused on hardware-near systems.
• GPU kernels (CUDA/HIP/Triton) and inference serving optimization.
• Strong problem-solving with hardware-aware design.
• Comfortable interacting with customers and cross-functional teams.

Responsibilities

• Ship day-zero support for new open-source models tuned for latency/throughput.
• Optimize serving stack: batching, KV cache, speculative decoding, quantization.
• Write/tune kernels in CUDA, HIP, Triton for NVIDIA, AMD, TPU, Trainium, D-Matrix.
• Design, deploy, operate heterogeneous multi-vendor clusters.
• Run production inference: reliability, observability, cost per token.

Skills

SWE near hardware

GPU kernel programming

First-principles problem solving

Customer-facing communication

Tools

CUDA

HIP

Triton

Python

TPU

AWS Trainium

Job description

Wafer AI: maximize intelligence per watt; autonomous AI performance engineers optimizing inference on heterogeneous hardware. 7 people, $4M raised, SF.

Comp: $200K-$300K + 0.5%-1% equity. Location: on-site 5 days FiDi SF. Visa: Visa transfers (H-1B transfer, OPT); must already be in US; no new H1B.

Responsibilities

• Ship day-zero support for new open-source models tuned for latency/throughput

• Optimize serving stack: batching, KV cache, speculative decoding, quantization

• Write/tune kernels in CUDA, HIP, Triton for NVIDIA, AMD, TPU, Trainium, D-Matrix

• Design, deploy, operate heterogeneous multi-vendor clusters

• Run production inference: reliability, observability, cost per token

Tech stack: CUDA, HIP, Triton, Python, TPU, AWS Trainium

Source: https://www.paraform.com/share/wafer-ai/cmrtyva4m000j0cl7i7j9wbue

• 1-6 yrs SWE focused on systems close to hardware

• GPU kernels (CUDA/HIP/Triton), inference serving optimization

• First-principles, resourceful, high EQ; customer-facing comfort

• On-site 5 days SF; must be in US