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Hewlett Packard Enterprise seeks a VLSI Physical Design Lead Engineer in a hybrid Colorado posting. The role leads architecture, timing, and physical implementations of complex ICs, guiding teams and collaborating with partners to meet aggressive time-to-market goals.
Requirements include a strong track record in VLSI, extensive experience with industry-standard EDA tools, and leadership capabilities. The position offers comprehensive benefits and a competitive salary range in the US.
This role has been designed as 'Hybrid' with a requirement that you will work on average 2 days per week from an HPE office.
Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE.
Job Family Definition: Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems. Influences architecture and logic design and builds physical implementations through development of multidimensional designs involving the layout of complex integrated circuits. Analyzes designs to establish operating data, conducts experimental tests and evaluates results to enable prototype and production VLSI solutions. Will direct support personnel in the preparation of detailed design, design testing and prototype fabrication.
Management Level Definition: Contributions have visible technical impact on a product or major subcomponent. Applies in-depth professional knowledge and innovative ideas to solve complex problems. Visible contributions improve time-to-market, achieve cost reductions, or satisfy current and future unmet customer needs. Recognized internal authority on key technology area applying innovative principles and ideas. Provides technical leadership for significant project/program work. Leads or participates in cross-functional initiatives and contributes to mentorship and knowledge sharing across the organization.
Leadership experience and mastery in electrical engineering fundamentals, VLSI principles, digital logic, and computer architecture. Experience with: Static timing analysis and timing signoff Timing constraints and validation Synthesis and netlist quality analysis Formal verification Floorplanning and chip partitioning ECO implementation Experience with industry-standard EDA tools, such as Synopsys Fusion Compiler, Design Compiler, PrimeTime, or Formality, and/or Cadence RTL Compiler, Genus, or LEC. Experience with clock, I/O, test, and other specialized timing-closure challenges. Experience developing ASIC implementation flows, automation, and design methodologies. Experience working with advanced process technologies and complex, high-performance ASIC designs. Experience with hierarchical timing analysis and full-chip timing closure. Excellent analytical and problem solving skills. Ability to work independently and collaboratively across multiple engineering disciplines. Mastery over designing VLSI components, integrated circuitry, architectures and algorithms into complex VLSI solutions. Mastery of a programming and scripting, hardware description language, electronic design automation (EDA), and/or FPGA tools. Coursework in VLSI design or VLSI concepts. Demonstrated ability to provide technical leadership, mentor engineers, and influence cross-functional design decisions. Mastery in executive written and verbal communication skills; mastery in English and local language. History of innovation and technical leadership with multiple patents/publications and technical presentations in the field of VSLI or Electronic/hardware component designs and tools.
HPE is committed to creating an inclusive and accessible workplace and encourages applications from all qualified individuals, including those with disabilities. If you believe you require accommodation during any stage of the application or interview process, please submit your request by completing our secure form linked here. Note: This option is reserved for applicants needing assistance/reasonable accommodation related to a disability.
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The expected salary/wage range for this position is provided below. Actual offer may vary from this range based upon geographic location, work experience, education/training, and/or skill level. – United States of America: Annual Salary USD 168,000 - 319,000 in Colorado // 159,500 - 367,000 in Minnesota & Wisconsin The listed salary range reflects base salary. Variable incentives may also be offered. Information about employee benefits offered in the US can be found at https://myhperewards.com/main/new-hire-enrollment.html The estimated job application period closure is February 1 2027; this timeline is provided for transparency and internal planning purposes.
HPE is an Equal Employment Opportunity/ Veterans/Disabled/LGBT employer. We do not discriminate on the basis of race, gender, or any other protected category, and all decisions we make are made on the basis of qualifications, merit, and business need. Our goal is to be one global team that is representative of our customers, in an inclusive environment where we can continue to innovate and grow together.
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HPE is committed to creating an inclusive and accessible workplace and encourages applications from all qualified individuals, including those with disabilities. If you believe you require accommodation during any stage of the application or interview process, please submit your request by completing our secure form linked here. Note: This option is reserved for applicants needing assistance/reasonable accommodation related to a disability.
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