VLSI Lead L1

Wipro; Sunnyvale (CA); On-site; USD 80,000 - 150,000; Full time

Benefits offered by this job

Medical & dental benefits

Disability insurance

Paid time off

Job summary

Wipro in Sunnyvale, California, is seeking an experienced silicon validation engineer focused on display and SOC verification. You will validate display SOC, mixed-signal SOC, and IP, and define validation strategies aligned with RTL, architecture, and FW.

You will develop validation infrastructure, code in C/C++ and Python (Zebu), FPGA (HAPS), and work on bring-up, workload enablement, SW stack validation, and power/performance characterization.

Qualifications

• Experience: 5-8 years in silicon validation.
• Mandatory skills: PSV, RTL, Debugging, ARM SOC.
• Display domain focus is important even if ML coprocesor background is not required.

Responsibilities

• Execute bring-up/debug, workload enablement, and SW stack validation.
• Perform performance and power characterization.
• Create automated data collection flows and convert large datasets into executive summaries.
• Track test coverage, document bugs, drive cross-functional debug, and verify silicon fixes.
• Collaborate with factory test teams to align validation and production characterization strategies.

Skills

PSV

RTL

Debugging

ARM SOC

Tools

C/C++

Python

Job description

Job Description

• Engineer does not need to have ML-coprocessor background. Display domain is more important.
• Validate display SOC, Mixed Signal SOC, and IP. (good)
• Define validation strategy and test plans for new IP blocks, aligning with RTL, architecture, FW. (good)
• Develop silicon validation infrastructure and coding C/C++ and Python for emulation (Zebu), FPGA (HAPS), and first silicon platforms. Identify risks and develop mitigation strategies. (Good)
• Execute bring-up/debug, workload enablement, and SW stack validation. (Must)
• Perform performance and power characterization. (Must)
• Create automated data collection flows and convert large datasets into executive summaries. (Must)
• Track test coverage, document bugs, drive cross-functional debug, and verify silicon fixes. (Must)
• Participate in design reviews and provide recommendations to strengthen validation coverage. (Good)
• Collaborate with factory test teams to align validation and production characterization strategies. (Must)

Required Skills

• Mandatory Skills: PSV, RTL, Debugging, ARM SOC
• Experience: 5-8 Years.

Compensation & Benefits

• The expected compensation for this role ranges from $80,000 to $150,000.
• Final compensation will depend on various factors, including your geographical location, minimum wage obligations, skills, and relevant experience. Based on the position, the role is also eligible for Wipro's standard benefits including a full range of medical and dental benefits options, disability insurance, paid time off (inclusive of sick leave), other paid and unpaid leave options.
• a full range of medical and dental benefits options, disability insurance, paid time off (inclusive of sick leave), other paid and unpaid leave options.

Applicants are advised that employment in some roles may be conditioned on successful completion of a post-offer drug screening, subject to applicable state law.

Wipro provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state, or local laws. Applications from veterans and people with disabilities are explicitly welcome.

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